tag: Codasip

Not All There: Heterogeneous Multiprocessor Design Tools
By Brian Bailey - 26 Jun, 2023 - Comments: 0

The design, implementation, and programming of multicore heterogeneous systems is becoming more common, often driven by the software workloads, but the tooling to help optimize the processors, interconnect, and memory are disjointed. Over the past few years, many tools have emerged that help with the definition and implementation of a single processor, optimized for a given set of software. ... » read more

Week In Review: Semiconductor Manufacturing, Test
By Susan Rambo - 23 Jun, 2023 - Comments: 0

The CHIPS for America team at the U.S. Department of Commerce named the selection committee who will select board members for the nonprofit entity that will likely be managing the National Semiconductor Technology Center (NSTC). Members include John Hennessy, chairman of Alphabet; Jason Matheny, president and CEO of the RAND Corporation; Don Rosenberg, fellow in residence at UCSD’s School of ... » read more

The Uncertainties Of RISC-V Compliance
By Ann Mutschler - 22 Jun, 2023 - Comments: 0

How far can a RISC-V design be pushed and still be compliant? The answer isn't always black-and-white because the RISC-V concept is very different from previous open-source projects. But as interest and activity in RISC-V continues to grow, constructive discussions are taking place to address some of the challenges of designing with an open-standard ISA. “The RISC-V standard is somethin... » read more

Developing A Customized RISC-V Core For MEMS Sensors
By Tora Fridholm - 22 Jun, 2023 - Comments: 0

We recently described how Codasip Labs is working with the NimbleAI project to push the boundaries of neuromorphic vision. Let’s talk about another cool project. This project is focused on another sense, hearing. We will use our unique Codasip Studio design toolset to develop a customized RISC-V core for MEMS (micro-electro-mechanical system) sensors. Again, technology is inspired by bio... » read more

Blog Review: June 21
By Jesse Allen - 21 Jun, 2023 - Comments: 0

Synopsys' Vikram Bhatia identifies four trends driving the migration of EDA tools and chip design workloads to the cloud, from ever-increasing compute and time-to-market demands to advanced cybersecurity features. Cadence's Veena Parthan checks out how computational fluid dynamics and finite element analysis can help improve aquaculture with sustainable fish cage nets that minimize stagnatio... » read more

L31 Embedded Core Extensions For Wireless And Connectivity
By Codasip - 21 Jun, 2023 - Comments: 0

5G is the latest generation of cellular networks using the 3rd Generation Partnership Project (3GPP) 5G New Radio air interface. Unlike previous generations of network (2G, 3G & 4G), which had a one-size-fits-all approach, 5G aims to address a wide range of very different applications. To flexibly support diverse quality of service requirements, network slicing is introduced to enable multip... » read more

Power/Performance Costs Of Securing Systems
By Brian Bailey - 08 Jun, 2023 - Comments: 0

For much of the chip industry, concerns about security are relatively new, but the requirement for protecting semiconductor devices is becoming pervasive. Unfortunately for many industries, that lesson has been learned the hard way. Security breaches have led to the loss of sensitive data, ransomware attacks that lock up data, theft of intellectual property or financial resources, and loss o... » read more

Software-Defined Hardware Architectures
By Brian Bailey - 31 May, 2023 - Comments: 0

Hardware/software co-design has been a goal for several decades, but success has been limited. More recently, progress has been made in optimizing a processor as well as the addition of accelerators for a given software workload. While those two techniques can produce incredible gains, it is not enough. With increasing demands being placed on all types of processing, single-processor solutio... » read more

IP Becoming More Complex, More Costly
By Brian Bailey - 25 May, 2023 - Comments: 0

Success in the semiconductor intellectual property (IP) market requires more than a good bit of RTL. New advances mandate a complete design, implementation, and verification team, which limits the number of companies competing in this market. What constitutes an IP block has changed significantly since the concept was first introduced in the 1990s. What was initially just a piece of RTL (reg... » read more

No One-Size-Fits-All Approach To RISC-V Processor Optimization
By Mike Eftimakis - 25 May, 2023 - Comments: 0

As the demand for high-performance processors continues to grow and semiconductor scaling laws continue to show their limits, the need for processor optimization is inevitable. As I explained in a previous blog, RISC-V is designed to enable this. However, there is no one-size-fits-all approach to processor optimization. As each workload and each application will have their own requirements, th... » read more

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