A Formal-Based Approach For Efficient RISC-V Processor Verification


The openness of RISC-V allows customizing and extending the architecture and microarchitecture of a RISC-V based core to meet specific requirements. This appetite for more design freedom is also shifting the verification responsibility to a growing community of developers. Processor verification, however, is never easy. The very novelty and flexibility of the new specification results in new fu... » read more

Blog Review: May 24


Siemens' Patrick McGoff finds that designers have not had easy tools to address solderability, leaving a critical part of the manufacturing success of a PCB to the component engineer or the contract manufacturer, and points to manufacturing-driven design as a way to avoid quality issues later. Cadence's Rich Chang finds that effective UPF low-power verification and debug involves more than o... » read more

Blog Review: May 10


Synopsys' Alessandra Nardi and Uyen Tran explain how to meet quality, reliability, functional safety, and security requirements of automotive chips through thorough test programs, path-margin monitoring, and design failure mode and effect analysis (DFMEA). Cadence's Veena Parthan explores how computational fluid dynamics can help predict and model the generation, propagation, and mitigation ... » read more

Working With The NimbleAI Project To Push The Boundaries Of Neuromorphic Vision


At the end of 2022, the EU kicked off a cool project that aims to implement neuromorphic vision. But what is that? Let’s take a deeper look at the project and our contribution. First, if you are not familiar with Codasip Labs, I want to mention this briefly. Codasip Labs is in fact our innovation hub where we explore new technologies and try to contribute to the technology of the future. ... » read more

Blog Review: April 26


Codasip's Tora Fridholm introduces the NimbleAI project, an effort to design a neuromorphic sensing and processing 3D integrated chip that implements an always-on sensing stage, highly specialized event-driven processing kernels and neural networks to perform visual inference of selected stimuli using the bare minimum amount of energy. Synopsys' Anjaneya Thakar discusses computational lithog... » read more

RISC-V Driving New Verification Concepts


Semiconductor Engineering sat down to discuss gaps in tools and why new methodologies are needed for RISC-V processors, with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, ... » read more

Blog Review: April 5


Synopsys's Gordon Cooper argues that AI transformer models, initially developed for natural language processing such as translation and question answering, are starting to make inroads in the computer vision application landscape and changing the direction of deep-learning architectures. Siemens' Patrick Hope shows how to identify opportunities to optimize a PCB design through the creation o... » read more

Do Necessary Tools Exist For RISC-V Verification?


Semiconductor Engineering sat down to discuss the verification of RISC-V processors with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, senior director of alliances partner... » read more

Embedded World 2023: It’s Time To Architect All Ambitions With Custom Compute


As soon as we arrived in Nuremberg, we could feel the city was buzzing and ready for a great Embedded World 2023 conference. It was hard to avoid exhibitors, speakers, and visitors at breakfast in the hotel or at dinner in restaurants – not to mention the waves in the metro! It was my first time at the conference, and I found the number of attendees and the quality of discussions very satisf... » read more

Compact NN Accelerator In CodAL


Recent years of IoT/IIoT evolution resulted in an important shift from cloud-level to device-level AI processing. It enables devices to run some AI tasks locally, thus minimizing security issues, data transfer costs, and latency. The ability to run AI/ML tasks becomes a must-have when selecting an SoC or MCU for IoT and IIoT applications. Embedded devices are typically resource-constrained, ... » read more

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