Formally Modeling and Verifying CXL Cache Coherence (Imperial College London)


A new technical paper titled "Formalising CXL Cache Coherence" was published by researchers at Imperial College London. Abstract "We report our experience formally modelling and verifying CXL.cache, the inter-device cache coherence protocol of the Compute Express Link standard. We have used the Isabelle proof assistant to create a formal model for CXL.cache based on the prose English spec... » read more

Survey of CXL Implementations and Standards (Intel, Microsoft)


A new technical paper titled "An Introduction to the Compute Express Link (CXL) Interconnect" was published by researchers at Intel Corporation, Microsoft, and University of Washington. Abstract "The Compute Express Link (CXL) is an open industry-standard interconnect between processors and devices such as accelerators, memory buffers, smart network interfaces, persistent memory, and solid-... » read more

SW/HW Codesign For CXL Memory Disaggregation In Billion-Scale Nearest Neighbor Search (KAIST)


A technical paper titled “Bridging Software-Hardware for CXL Memory Disaggregation in Billion-Scale Nearest Neighbor Search” was published by researchers at the Korea Advanced Institute of Science and Technology (KAIST) and Panmnesia. Abstract: "We propose CXL-ANNS, a software-hardware collaborative approach to enable scalable approximate nearest neighbor search (ANNS) services. To this e... » read more

CXL’s Protection Mechanisms And How They Handle Real-World Security Problems


A technical paper titled “How Flexible is CXL's Memory Protection?: Replacing a sledgehammer with a scalpel” was published by researchers at University of Cambridge. Abstract: "CXL, a new interconnect standard for cache-coherent memory sharing, is becoming a reality - but its security leaves something to be desired. Decentralized capabilities are flexible and resilient against malicious a... » read more

Enabling New Server Architectures With The CXL Interconnect


The ever-growing demand for higher performance compute is motivating the exploration of new compute offload architectures for the data center. Artificial intelligence and machine learning (AI/ML) are just one example of the increasingly complex and demanding workloads that are pushing data centers to move away from the classic server computing architecture. These more demanding workloads can be... » read more

CXL-Based Memory Pooling System Meets Cloud Performance Goals And Significantly Reduces DRAM Cost


A technical paper titled "Pond: CXL-Based Memory Pooling Systems for Cloud Platforms" was published by researchers at Virginia Tech, Intel, Microsoft Azure, Google, and Stone Co. Abstract "Public cloud providers seek to meet stringent performance requirements and low hardware cost. A key driver of performance and cost is main memory. Memory pooling promises to improve DRAM utilization and t... » read more

CXL Picks Up Steam In Data Centers


CXL is gaining traction inside large data centers as a way of boosting utilization of different compute elements, such as memories and accelerators, while minimizing the need for additional racks of servers. But the standard is being extended and modified so quickly that it is difficult to keep up with all the changes, each of which needs to be verified and validated across a growing swath of h... » read more

CXL 3.0: From Expansion To Scaling


At the Flash Memory Summit in August, the CXL Consortium released the latest, and highly anticipated, version 3.0 of the Compute Express Link (CXL) specification. This new version of the specification builds on previous generations and introduces several compelling new features that promise to increase data center performance and scalability, while reducing the total cost of ownership (TCO). ... » read more

Compute Express Link (CXL): All You Need To Know


An in-depth look at Compute Express Link  (CXL) 2.0, an open standard cache-coherent interconnect between processors and accelerators, smart NICs, and memory devices. We explore how CXL is helping data centers more efficiently handle the yottabytes of data generated by artificial intelligence (AI) and machine learning (ML) applications. We discuss how CXL technology maintains memory c... » read more

Choosing The Right Server Interface Architectures For High Performance Computing


The largest bulk and cost of a modern high-performance computing (HPC) installation involves the acquisition or provisioning of many identical systems, interconnected by one or more networks, typically Ethernet and/or InfiniBand. Most HPC experts know that there are many choices between different server manufacturers and the options of form factor, CPU, RAM configuration, out of band management... » read more

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