tag: CPU

Navigating The GPU Revolution
By Gregory Haley - 24 Apr, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the impact of GPU acceleration on mask design and production and other process technologies, with Aki Fujimura, CEO of D2S; Youping Zhang, head of ASML Brion; Yalin Xiong, senior vice president and general manager of the BBP and reticle products division at KLA; and Kostas Adam, vice president of engineering at Synopsys. What f... » read more

Generative AI On Mobile Is Running On The Arm CPU
By Adnan Al-Sinan - 15 Feb, 2024 - Comments: 0

By Adnan Al-Sinan and Gian Marco Iodice 2023 was the year that showcased an impressive number of use cases powered by generative AI. This disruptive form of artificial intelligence (AI) technology is at the heart OpenAI's ChatGPT and Google’s Gemini AI model, with it demonstrating the opportunity to simplify work and advance education through generating text, images, or even audio content ... » read more

SoC Telemetry & Performance Analysis Using Statistical Profiling Extension
By Brian Jeff - 11 Jan, 2024 - Comments: 0

The Arm Statistical Profiling Extension (SPE) is an architectural feature designed for enhanced instruction execution profiling within Arm CPUs. This feature has been available since the introduction of the Neoverse N1 CPU platform in 2019, along with performance monitor units (PMUs) generally available in Arm CPUs. An important step in extracting value from capabilities like SPE and PMUs is th... » read more

Flipping Processor Design On Its Head
By Ann Mutschler - 09 Nov, 2023 - Comments: 2

AI is changing processor design in fundamental ways, combining customized processing elements for specific AI workloads with more traditional processors for other tasks. But the tradeoffs are increasingly confusing, complex, and challenging to manage. For example, workloads can change faster than the time it takes to churn out customized designs. In addition, the AI-specific processes may ex... » read more

CXL’s Protection Mechanisms And How They Handle Real-World Security Problems
By Technical Paper Link - 06 Sep, 2023 - Comments: 0

A technical paper titled “How Flexible is CXL's Memory Protection?: Replacing a sledgehammer with a scalpel” was published by researchers at University of Cambridge. Abstract: "CXL, a new interconnect standard for cache-coherent memory sharing, is becoming a reality - but its security leaves something to be desired. Decentralized capabilities are flexible and resilient against malicious a... » read more

Transient Execution Attacks That Leaks Arbitrary Kernel Memory (ETH Zurich)
By Technical Paper Link - 25 Aug, 2023 - Comments: 0

A technical paper titled “Inception: Exposing New Attack Surfaces with Training in Transient Execution” was published by researchers at ETH Zurich. Abstract: "To protect against transient control-flow hijacks, software relies on a secure state of microarchitectural buffers that are involved in branching decisions. To achieve this secure state, hardware and software mitigations restrict or... » read more

Programming Processors In Heterogeneous Architectures
By Ann Mutschler - 08 Jun, 2023 - Comments: 0

Programming processors is becoming more complicated as more and different types of processing elements are included in the same architecture. While systems architects may revel in the number of options available for improving power, performance, and area, the challenge of programming functionality and making it all work together is turning out to be a major challenge. It involves multiple pr... » read more

64-Bit RISC-V Microprocessor Delivers New Options For IoT Edge Development
By Renesas - 21 Sep, 2022 - Comments: 0

Global and rapidly expanding IoT edge devices are becoming increasingly important for connecting various sensors to the cloud via networks. IoT edge devices are progressively integrating 64-bit microprocessors capable of running Linux and similar high-performance operating systems. Moreover, recent import and export regulation changes have produced a need for choices in CPU architecture for mic... » read more

Scaling, Advanced Packaging, Or Both
By Ed Sperling - 01 Aug, 2022 - Comments: 0

Chipmakers are facing a growing number of challenges and tradeoffs at the leading edge, where the cost of process shrinks is already exorbitant and rising. While it's theoretically possible to scale digital logic to 10 angstroms (1nm) and below, the likelihood of a planar SoC being developed at that nodes appears increasingly unlikely. This is hardly shocking in an industry that has heard pr... » read more

Effect of Different Frequency Scaling Levels on Memory in Regard to Total Power Consumption in Mobile MPSoC
By Technical Paper Link - 06 Jun, 2022 - Comments: 0

New technical paper titled "CPU-GPU-Memory DVFS for Power-Efficient MPSoC in Mobile Cyber Physical Systems" from researchers at University of Essex, Nosh Technologies, and University of Southampton. Abstract "Most modern mobile cyber-physical systems such as smartphones come equipped with multi-processor systems-on-chip (MPSoCs) with variant computing capacity both to cater to performance r... » read more

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