Waiting For Chiplet Standards


The need and desire for chiplets is increasing, but for most companies that shift will happen slowly until proven standards are in place. Interoperability and compatibility depend on many layers and segments of the supply chain coming to agreement. Unfortunately, fragmented industry requirements may lead to a plethora of solutions. Standards always have enabled increasing specialization. ... » read more

CXL: Sorting Out The Interconnect Soup


In the webinar Hidden Signals: Memory and Interconnect Decisions for AI, IoT and 5G, Shane Rau of IDC and Rambus Fellow Steven Woo discussed how interconnects were a critical enabling technology for future computing platforms. One of the major complications was the “interconnect soup” of numerous and divergent interface protocols. The Compute Express Link (CXL) standard offers to sort out m... » read more

Usage Models Driving Data Center Architecture Changes


Data center architectures are undergoing a significant change, fueled by more data and much greater usage from remote locations. Part of this shift involves the need to move some processing closer to the various memory hierarchies, from SRAM to DRAM to storage. There is more data to process, and it takes less energy and time to process that data in place. But workloads also are being distrib... » read more

Week In Review: Design, Low Power


The CXL Consortium published the Compute Express Link 2.0 specification. CXL is an interconnect that maintains memory coherency between the CPU memory space and memory on attached devices. CXL 2.0 adds support for switching for fan-out to connect to more devices, memory pooling for increased memory utilization efficiency and providing memory capacity on demand, and support for persistent memory... » read more

Data Overload In The Data Center


Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

Week In Review: Design, Low Power


Xilinx acquired the assets of Falcon Computing Solutions, a provider of high-level synthesis (HLS) compiler optimization technology for hardware acceleration of software applications. The acquisition will be integrated into the Xilinx Vitis Unified Software Platform to automate hardware-aware optimizations of C++ applications with minimal hardware expertise. “Our compiler provides a high degr... » read more

Week In Review: Design, Low Power


M&A Synopsys acquired Moortec, a provider of in-chip monitoring technology specializing in process, voltage and temperature (PVT) sensors. Moortec's sensors will be a key component to Synopsys' new Silicon Lifecycle Management (SLM) platform. "This acquisition accelerates the expansion of our SLM platform by providing our customers with a comprehensive data-analytics-driven solution for de... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Cadence achieved ASIL Level B in support of D (ASIL B(D))-compliant certification for its Tensilica ConnX B10 and ConnX B20 DSPs, which are designed for automotive radar, lidar, and vehicle-to-everything (V2X). SGS-TÜV Saar certified that the DSPs have support for random hardware faults and systematic faults. Synopsys is acquiring Moortec, whose process, voltage, and temperature... » read more

AI & IP In Edge Computing For Faster 5G And The IoT


Edge computing, which is the concept of processing and analyzing data in servers closer to the applications they serve, is growing in popularity and opening new markets for established telecom providers, semiconductor startups, and new software ecosystems. It’s brilliant how technology has come together over the last several decades to enable this new space starting with Big Data and the idea... » read more

Rethinking Competitive One Upmanship Among Foundries


The winner in the foundry business used to be determined by who got to the most advanced process node first. For the most part that benchmark no longer works. Unlike in the past, when all of the foundries and IDMs competed using basically the same process, each foundry has gone its own route. This is primarily due to the divergence of end markets, and the realization that as costs increase, ... » read more

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