Business, Technology Challenges Increase For Photomasks


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

China Accelerates Foundry, Power Semi Efforts


China has unveiled several initiatives to advance its domestic semiconductor industry, including a new and massive fab expansion campaign in the foundry, gallium-nitride (GaN), and silicon carbide (SiC) markets. The nation is making a big push into what it calls “third-generation semiconductors,” which is a misnomer. The term actually refers to two existing and common power semiconductor... » read more

Semiconductor Photomask Revenues Predicted To Increase In 2021


A majority (72%) of industry luminaries surveyed in July predict an increase in photomask revenues for 2021, as shown in figure 1. SEMI also predicts revenues to increase around 9% from $4.4B in 2020 to $4.8B in 2021. In a 12-minute video, a panel of experts share their perspectives on what’s behind the growth trend, how the pandemic has impacted the photomask industry, and how it compares to... » read more

Week In Review: Manufacturing, Test


Chipmakers AMD has rolled out its new MI200 series products, the first exascale-class GPU accelerators. Using a fan-out bridge packaging technology, the MI200 series are designed for high-performance computing (HPC) and artificial intelligence (AI) applications. The MI200 series accelerators feature a multi-die GPU architecture with 128GB of HBM2e memory. Typically, the HBM2e memory stack a... » read more

Week In Review: Manufacturing, Test


Packaging Amkor plans to build a packaging plant in Bac Ninh, Vietnam. The first phase of the new factory will focus on providing system-in-package (SiP) assembly and test services for customers. The investment for the first phase of the facility is estimated to be between $200 million and $250 million. “This is a strategic, long-term investment in geographical diversification and factory... » read more

Curvilinear Design Benefits For Wafers


Throughout this blog series the focus has been on curvilinear photomasks – the benefits, enablers, and challenges. It leads to the obvious question that Aki Fujimura, CEO of D2S, put to the panel of luminaries. If leading-edge mask shops are ready for curvilinear shapes on mask enabled by curvilinear ILT, multi-beam mask writers and the mask design chain, can we have curvilinear target shapes... » read more

Gearing Up For High-NA EUV


The semiconductor industry is moving full speed ahead to develop high-NA EUV, but bringing up this next generation lithography system and the associated infrastructure remains a monumental and expensive task. ASML has been developing its high-numerical aperture (high-NA) EUV lithography line for some time. Basically, high-NA EUV scanners are the follow-on to today’s EUV lithography systems... » read more

Inverse lithography technology: 30 years from concept to practical, full-chip reality


Published in the Journal of Micro/Nanopatterning, Materials, and Metrology, Aug. 31, 2021. Read the full technical paper here (open access). Abstract In lithography, optical proximity and process bias/effects need to be corrected to achieve the best wafer print. Efforts to correct for these effects started with a simple bias, adding a hammer head in line-ends to prevent line-end shortening. T... » read more

System-In-Package Thrives In The Shadows


IC packaging continues to play a big role in the development of new electronic products, particularly with system-in-package (SiP), a successful approach that continues to gain momentum — but mostly under the radar because it adds a competitive edge. With a SiP, several chips and other components are integrated into a package, enabling it to function as an electronic system or sub-system. ... » read more

Optimizing VSB Shot Count For Curvilinear Masks


The increased photomask write time using a variable-shape e-beam (VSB) writer has been a barrier to the adoption of inverse lithography technology (ILT) beyond the limited usage for hot spots. The second installment of this video blog looked at the challenge in depth. In this five-minute panel video with industry luminaries, Ezequiel Russell describes the collaborative study between his company... » read more

← Older posts Newer posts →