tag: DDR

Latency Under Load: HBM2 vs. GDDR6
By Ed Sperling - 09 May, 2019 - Comments: 0

Steven Woo, Rambus fellow and distinguished inventor, explains why data traffic and bandwidth are critical to choosing the type of DRAM, options for improving traffic flow in different memory types, and how this works with multiple memory types.   Related Video GDDR6 - HBM2 Tradeoffs Why designers choose one memory type over another. Applications for each were clearly delineate... » read more

The Importance Of Using The Right DDR SDRAM Memory
By Vadhiraj Sankaranarayanan - 14 Mar, 2019 - Comments: 0

Selecting the right memory technology is often the most critical decision for achieving the optimal system performance. Designers continue to add more cores and functionality to their SoCs; however, increasing performance while keeping power consumption low and silicon footprint small remains a vital goal. DDR SDRAMs, DRAMs in short, meet these memory requirements by offering a dense, high-perf... » read more

Using Memory Differently
By Ann Mutschler - 31 Jan, 2019 - Comments: 0

Chip architects are beginning to rewrite the rules on how to choose, configure and use different types of memory, particularly for chips with AI and some advanced SoCs. Chipmakers now have a number of options and tradeoffs to consider when choosing memories, based on factors such as the application and the characteristics of the memory workload, because different memory types work better tha... » read more

Making Sense Of DRAM
By Ed Sperling - 13 Dec, 2018 - Comments: 0

Graham Allan, senior manager for product marketing at Synopsys, examines the different types of DRAM, from GDDR to HBM, which markets they’re used in, and why there is such disparity between them. https://youtu.be/ynvcPfD2cZU     __________________________________ See more tech talk videos here. » read more

Agile Standards
By Brian Bailey - 08 Aug, 2018 - Comments: 0

Semiconductor Engineering sat down with Lu Dai, chairman for Accellera and senior director of engineering at Qualcomm, to discuss what's changing in standards development. What follows are excerpts of that conversation. SE: Accellera has had a great first half of the year. Dai: Yes, we are only half way through the year and yet we got Portable Stimulus Standard (PSS) out, the SystemC CCI ... » read more

The PCB Engineer’s Guide To Successful DDR Bus Design
By Mentor, a Siemens Business - 21 Mar, 2018 - Comments: 0

This paper tackles the critical signal integrity concerns encountered when designing, simulating, and analyzing DDR buses. The first section describes DDR bus design challenges that can be particularly problematic, even intimidating, to designers. Subsequent sections describe how simulation and analysis speed up the design of a functioning DDR system to reduce PCB spins and shorten the time to ... » read more

Tech Talk: eFPGA Acceleration
By Ed Sperling - 03 May, 2017 - Comments: 0

Achronix's Kent Orthner talks about when and why to use embedded FPGAs, and how they co-exist with—and compare to—other processing elements. [youtube vid=TXeIOmo7O9o] » read more

The Hunt For A Low-Power PHY
By Brian Bailey - 17 Apr, 2017 - Comments: 0

Physics has been on the side of chipmakers throughout most of the lifetime of [getkc id="74" comment="Moore's Law"], but when dealing with the world outside the chip, physics is working against them. Pushing data at ever-faster rates through boards and systems consumes increasing amounts of power, but the power budget for chips has not been increasing. Could chips be constrained by their int... » read more

HBM Upstages DDR In Bandwidth, Power
By Ann Mutschler - 30 Mar, 2017 - Comments: 1

For graphics, networking, and high performance computing, the latest iteration of high-bandwidth memory (HBM) continues to rise up as a viable contender against conventional DDR, GDDR designs, and other advanced memory architectures such as the Hybrid Memory Cube. [getkc id="276" kc_name="HBM"] enables lower power consumption per I/O and higher bandwidth memory access with a more condensed f... » read more

Chip Advances Play Big Role In Cloud
By Gale Morrison - 12 Dec, 2016 - Comments: 0

Semiconductor engineering teams have been collaborating with key players in the data center ecosystem in recent years, resulting in unforeseen and substantial changes in how data centers are architected and built. That includes everything from which boxes, boards, cards and cables go where, to how much it costs to run them. The result is that bedrock communication technology and standards li... » read more

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