tag: debug

Optimizing Emulator Utilization
By Mentor, a Siemens Business - 11 Feb, 2015 - Comments: 0

Russ Klein describes how Codelink, a Mentor Graphics trace-based debug tool, gives software developers a traditional software debug view from a unique processor trace, enabling them to increase emulator utilization and enjoy a more productive debug experience. Codelink allows for software debug earlier in the design cycle, as it makes it possible to use the emulator without having debug circuit... » read more

Building A Better Customized Debug And Trace Solution For Multi-Core SoCs
By Mayank Sharma - 04 Dec, 2014 - Comments: 0

If you think of debug as solving a murder case through the use of backward reasoning, then trace is the video surveillance that helps pinpoint the culprit. Trace is invaluable as it provides real-time visibility into errors, and dramatically cuts down on design cycles and iterations. A recent study done by Cambridge University found that the global cost of software debugging has risen to the... » read more

Debugging Performance Issues With Qt-based UI Applications
By Mentor, a Siemens Business - 03 Dec, 2014 - Comments: 0

Interactive user interfaces (UI) are fast becoming a basic requirement in many embedded applications and Qt is a popular cross-platform application and framework to help develop such compelling UIs. As with any software application, embedded UI development also requires numerous debugging iterations to achieve the level of desired performance (e.g. non-laggy response etc.) This whitepaper walks... » read more

Taking The Mystery Out Of IP, SoC And Automotive System Debug
By Larry Vivolo - 09 Oct, 2014 - Comments: 0

I recently had to take my car to the dealership because the gas-saving "auto-shut-off-while-stopped" feature wasn't working. The dealer explained that the reason it took two days to debug was because it "touched on many systems" in the car. In the end, they realized the battery wasn't fully charged and blamed it on my short 10-mile commute. Whether that was an honest answer or an example of ... » read more

Verification Planning And Requirement Tracking For Analog Design
By Mentor, a Siemens Business - 24 Sep, 2014 - Comments: 0

Verifying designs to meet all specifications across all process corners has become an intractable problem from the perspective of debugging, managing, tracking, and meeting verification goals. Implementing a CDV methodology for analog designs can evolve analog design and verification to a standard process-based method that can be tracked and its progress measured. This paper aims to extend comm... » read more

IP/SoC Verification With Assertions
By Larry Vivolo - 07 Aug, 2014 - Comments: 1

There's been a lot of excitement here in Silicon Valley these past weeks with the opening of the new 49ers stadium. I've always found it amazing to see how so many complex, fundamentally different technologies — mechanical, electrical, HVAC, plumbing, audiovisual, food catering, etc. — can be put together to create a functioning ballpark. It all but takes a mastermind to bring all these eng... » read more

Planning For The Unexpected
By Tom De Schutter - 24 Jul, 2014 - Comments: 0

Last month we undertook a big family trip. My parents, my brother and his family came from Belgium to California, and together we embarked on a trip across the Northwest United States. Starting in Silicon Valley we drove via Lake Tahoe and Salt Lake City to Yellowstone. Afterward, we crossed over to Seattle and Portland to finish off the trip with visits to Crater Lake and Lassen Volcanic Natio... » read more

The Assertion Conundrum
By Ann Mutschler - 22 May, 2014 - Comments: 2

It is well documented and widely agreed that assertions can provide a tremendous benefit to design and verification teams by reducing and even eliminating debug – but their use is still not ubiquitous. Part of the reason is that assertions cannot be picked up casually, noted David Larson, director of verification at [getentity id="22150" e_name="Synapse Design"]. “This is because asserti... » read more

How To Improve Debug Productivity
By Ann Mutschler - 24 Apr, 2014 - Comments: 0

In the realm of SoC verification world, it often takes a very short amount of time to write the testbench and the code, and the rest of the time — up to 90% — is spent debugging. After all, verification is essentially finding the bugs in a design. Debugging essentially has evolved over the years on the same path and complexity curve as design. Now debugging needs to evolve to keep pace, ... » read more

Localized, System-Level Protocol Checks And Coverage Closure
By Various Writers - 23 Apr, 2014 - Comments: 0

Broadcom recently developed a unified, scalable, verification methodology based on the Veloce emulation platform. In order to test this new environment, they ran a test case, which proved that they can take assertions, compile them into Veloce, and verify that they fire accurately. In so doing, they were able to provide proof of concept for their primary goal: the creation of an internal flow t... » read more

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