Eyes On Zero Defects: Defect Detection And Characterization Metrology


By Darin Collins and Jessica Albright Metrology is the science of measuring, characterizing, and analyzing materials. Within metrology, there are several technologies used to detect material defects on a very small scale – precision on the scale of parts per trillion or less is necessary in the pursuit of zero defects. We broadly define our characterization approach into three main categor... » read more

Defect Challenges Grow For IC Packaging


Several vendors are ramping up new inspection equipment based on infrared, optical, and X-ray technologies in an effort to reduce defects in current and future IC packages. While all of these technologies are necessary, they also are complementary. No one tool can meet all defect inspection requirements. As a result, packaging vendors may need to buy more and different tools. For years, p... » read more

Better Inspection, Higher Yield


Wafers can be inspected for large, obvious defects, or for small, subtle ones. The former is referred to as macro-inspection, while the latter is micro-inspection. These processes use different machines with different capital and operating costs, and they might look like competing approaches with different economic returns. In fact, they are complementary tactics that can be balanced within an ... » read more

Finding Defects With E-Beam Inspection


Several companies are developing or shipping next-generation e-beam inspection systems in an effort to reduce defects in advanced logic and memory chips. Vendors are taking two approaches with these new e-beam inspection systems. One is a more traditional approach, which uses a single-beam e-beam system. Others, meanwhile, are developing newer multi-beam technology. Both approaches have thei... » read more

Using Fab Sensors To Reduce Auto Defects


The semiconductor manufacturing ecosystem has begun collaborating on ways to effectively use wafer data to meet the stringent quality and reliability requirements for automotive ICs. Silicon manufacturing companies are now leveraging equipment and inspection monitors to proactively identify impactful defects prior to electrical test. Using machine learning techniques, they combine the monitor ... » read more

What Machine Learning Can Do In Fabs


Semiconductor Engineering sat down to discuss the issues and challenges with machine learning in semiconductor manufacturing with Kurt Ronse, director of the advanced lithography program at Imec; Yudong Hao, senior director of marketing at Onto Innovation; Romain Roux, data scientist at Mycronic; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. L-R:... » read more

Defect Evolution In Next Generation, Extreme Ultraviolet Lithography


Extreme ultraviolet (EUV) lithography is a promising next generation lithography technology that may succeed optical lithography at future technology nodes. EUV mask infrastructure and manufacturing of defect-free EUV mask blanks is a key near term challenge in the use of EUV lithography. Virtual fabrication is a computerized technique to perform predictive, three dimensional modeling of sem... » read more

Making Light More Reliable


The buzz around photonics in packages and between packages is growing. Now the question is whether it will work as expected, and where it will be useful. Replacing electrical with optical signals has been on the technology horizon for some time. Light moves faster through fiber than electrons through copper. How much faster depends upon the diameter of the wires, the substrate and interconne... » read more

Things That Go Bump In The Daytime


There is no argument that autonomous technology is better at certain things than systems controlled by people. A computer-guided system has only one mission — to stay on the road, avoid object, and reach the end destination. It doesn't get tired, text, or look out the window. And it can park within a millimeter of a wall or another vehicle without hitting it, and do that every time — as lon... » read more

Making 3D Structures And Packages More Reliable


The move to smaller vertical structures and complex packaging schemes is straining existing testing approaches, particularly in heterogeneous combinations on a single chip and in multi-die packages. The complexity of these devices has exploded with the slowdown in scaling, as chipmakers turn to architectural solutions and new transistor structures rather than just relying on shrinking featur... » read more

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