tag: digital twins

Preventing Failures Before They Occur
By Bryon Moyer - 11 Jan, 2022 - Comments: 1

A decade or so ago, when MEMS sensors were in the limelight, one of the touted applications was to install them on industrial or other equipment to get an advance warning if the equipment was approaching failure. Today, in-circuit monitoring brings the same promise. Are these competing technologies? Or can they be made to work together? “Almost all advanced tool manufacturing companies ... » read more

How Verification And Validation Can Create A Comprehensive Digital Twin To Design Tomorrow’s Self-Driving Cars Today
By Shakeel Jeeawoody - 07 Oct, 2021 - Comments: 0

By Shakeel Jeeawoody and Hieu Tran Autonomous vehicles (AV) are the future of driving – and the future might not be so far away. Optimizing the capabilities of self-driving vehicles and the environment around them could lead to a mad dash to the financial finish line for manufacturers. Who takes the checkered flag will ultimately be determined by the efficiency and cost-effectiveness of th... » read more

Building Complex Chips That Last Longer
By Ed Sperling - 23 Sep, 2021 - Comments: 0

Semiconductor Engineering sat down to talk about design challenges in advanced packages and nodes with John Lee, vice president and general manager for semiconductors at Ansys; Shankar Krishnamoorthy, general manager of Synopsys' Design Group; Simon Burke, distinguished engineer at Xilinx; and Andrew Kahng, professor of CSE and ECE at UC San Diego. This discussion was held at the Ansys IDEAS co... » read more

Edge Computing: New Support For Digital Twins
By Ansys - 08 Sep, 2021 - Comments: 0

Digital twins are one of the most exciting technology developments to emerge over the past few years. By creating a virtual model of a physical product, then simulating its real-time operation, companies are optimizing maintenance, predicting critical maintenance events and fueling innovation via actual performance feedback. Because simulation requires computational resources and the associated... » read more

Choosing The Right Model Fidelity For Your Digital Twin
By Frank Schirrmeister - 29 Jul, 2021 - Comments: 0

The EDA industry has advanced by leaps and bounds with innovation. Every time we approach a new technology node, many algorithms have to be re-imagined. As the late Jim Ready often pointed out to me, compared to the world of software development, these semiconductor technology changes are the hardware equivalent to what Fred Brooks, in his seminal article “No Silver Bullet—Essence and Accid... » read more

Dynamic Fault Injection Into Digital Twins Of Safety-Critical Systems
By Fraunhofer IIS/EAS - 07 Jul, 2021 - Comments: 0

In this work we present a technology for dynamically introducing fault structures into digital twins without the need to change the virtual prototype model. The injection is done at the beginning of a simulation by dynamically rewiring the involved netlists. During the simulation on a real-time platform, faults can be activated or deactivated triggered by sequences, statistical effects or by ev... » read more

Staying A Step Ahead Of Hackers With Continuous Verification
By John Hallman - 16 Jun, 2021 - Comments: 0

We’re all familiar with the apps on our phones and how often they get updated. Most of the time, these updates are done over the air quickly and easily. Other times, a completely new download of the software is required. But let’s take a look at the hardware platforms that the software runs on. What happens when the hardware needs to be upgraded? Today’s hardware platforms are expensive t... » read more

Power, Performance — Avionics Designers Want It All
By Heidi Elliott - 10 Jun, 2021 - Comments: 0

Not long ago, the prevailing philosophy among chip designers for aviation systems could be summed up as, “I feel the need — the need for speed.” Today, aviation’s top guns have pulled back on the throttle a bit. There’s a more nuanced discussion balancing the need for performance versus power, with other factors coming into consideration such as safety, security certifications and ove... » read more

Merging Verification And Test
By Brian Bailey - 22 Apr, 2021 - Comments: 0

While the disciplines of functional verification and test serve different purposes, their histories were once closely intertwined. Recent safety and security monitoring requirements coupled with capabilities being embedded into devices is bringing them closer together again, but can they successfully cooperate to bring about improvements in both? Getting there may be difficult. Three phases ... » read more

Applications, Challenges For Using AI In Fabs
By Mark LaPedus - 14 Apr, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss chip scaling, transistors, new architectures, and packaging with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. Wh... » read more

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