Aspinity’s Analog Neural Net Wake-Up Call


Putting an analog chip in front of an always-on system for digitizing speech and having the analog chip listen for sounds of interest may help avoid huge power waste and data congestion in current voice-recognition systems. Aspinity, an analog neuromorphic semiconductor startup, has worked the problem and just announced its Reconfigurable Analog Modular Processor (RAMP) platform yesterday. RAMP... » read more

Why Analog Designs Fail


The gap between analog and digital reliability is growing, and digital designs appear to be winning. Reports show that analog content causes the most test failures and contributes significantly more than digital to field returns. The causes aren't always obvious, though. Some of it is due to the maturity of analog design and verification. While great strides have been made in digital circuit... » read more

Low Power At The Edge


The tech world has come to the realization in recent months that there is far too much data to process everything in the cloud. Now it is starting to come to grips with what that really means for edge and near-edge computing. There still are no rules for where or how that data will be parsed, but there is a growing recognition that some level of pre-processing will be necessary, and that in tur... » read more

Collaborative IC Design Mandates Integrated Data Management


Due to complexity and multi-domain expertise, custom IC design typically requires a team to successfully design and verify the project. Often, specific blocks are assigned to team members based on analog, digital, MEMS, RF expertise, across multiple geographies, and separate verification team members focus on block and system validation. This means that unstructured design files with multiple c... » read more

Lab-To-Fab Testing


Test equipment vendors are working on integrating testing and simulation in the lab with testing done later in the fab, setting the stage for what potentially could be the most significant change in semiconductor test in years. If they are successful, this could greatly simplify design for test, which has become increasingly difficult as chips get more complex, denser, and as more heterogene... » read more

High-Speed SerDes At 7nm


eSilicon’s David Axelrad discusses the challenges with 56Gbps and 112Gps SerDes, and why the switch from analog to digital is required for performance and low power. https://youtu.be/E-CU8TLvjjc » read more

Analog Migration Equals Redesign


Analog design has never been easy. Engineers can spend their entire careers focused just on phase-locked loops (PLLs), because to get them right the functionality of circuits need to be understood in depth, including how they respond across different process corners and different manufacturing processes. In the finFET era, those challenges have only intensified for analog circuits. Reuse, fo... » read more

Testing Analog Chips


The world of analog components is broad and diverse, and while testing analog chips may not take as long as running tests on complex SoCs, there are different requirements for analog devices. One type of chip that's seeing more application these days is analog microelectromechanical system devices. Automotive electronics call for a number of [getkc id="37" kc_name="analog"] chips, along with... » read more

Noise At 7nm And Beyond


The digital and analog worlds always have been very different. Digital engineers see the world in terms of electrons and a well-defined set of numerical values. Their waves are discrete and squared off and their devices are often noisy when they turn on and off. Analog engineers think in terms of quiet, smooth waves, and they are very concerned about anything that can disrupt those waves, such ... » read more

Tech Talk: EM Crosstalk


Anand Raman, senior director at Helic, talks about the impact of electromagnetic interference on digital design at 10/7nm and beyond. Once confined to the analog space, noise is suddenly an issue at advanced nodes for all designs. At the root of the problem are smaller nodes, increased speed and higher levels of integration. https://youtu.be/hzZqK2lNJNQ » read more

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