tag: Docea Power

More Art Than Science
By Ed Sperling - 08 Nov, 2012 - Comments: 0

By Ann Steffora Mutschler Not so long ago, high-end digital devices were mostly just digital. Today large SoCs contain a significant amount of analog/mixed-signal content. And given that analog circuits have certain sensitivities different from digital blocks, there is a desire to convert some of those analog signals to digital to achieve power savings and take advantage of digital verificat... » read more

The Growing Integration Challenge
By Ed Sperling - 08 Nov, 2012 - Comments: 0

By Ed Sperling As the number of processors and the amount of memory and IP on a chip continues to skyrocket, so does the challenge for integrating all of this stuff on a single die—or even multiple dies in the same package. There are a number of reasons why it’s getting more difficult to make all of these IP blocks work together. First of all, nothing ever stands still in design. As a r... » read more

Power Impacts On Advanced Node IP
By Ed Sperling - 08 Nov, 2012 - Comments: 0

By Ann Steffora Mutschler With the move to the 28nm or 20nm process nodes, SoC engineering teams are seeing a significant amount of variations due to manufacturability. To reflect how a design element will be printed on the wafer, foundries offer many libraries with multiple corners for different voltages, timing and temperature, among other things. “At 28nm what we are seeing is a l... » read more

Cellular Stranglehold?
By Ann Mutschler - 08 Nov, 2012 - Comments: 0

Do you ever feel like you are completely at the mercy of your cellular service provider? Yeah, me too. Not only did I have to change providers when I relocated, I had to buy a new phone of course. Since my old phone and my new phone were both iPhones, I thought for sure I could use the same car charger….but no dice. This fact has bothered me for quite some time because it made no sense to ... » read more

Experts At The Table: The Sky Isn’t Falling
By Ann Mutschler - 18 Oct, 2012 - Comments: 0

By Ann Steffora Mutschler SemiMD sat down recently to discuss how the industry is making 3D ICs a reality today with Sylvan Kaiser, chief technology officer at Docea Power; Steve Smith, senior director for 3D-IC strategy at Synopsys; and Dr. Ahmed Jerraya, director of strategic design programs at CEA-LETI. For part one of this series, click here. SemiMD: Because CEA-LETI has direct expe... » read more

Design For Power
By Ed Sperling - 11 Oct, 2012 - Comments: 0

By Ed Sperling Figuring out a single power budget and mapping out what has become known as holistic power intent for an SoC sounds great on paper, but reality has turned out to be somewhat different. While system architects still call the shots on how a chip is designed, there is a lot more information flowing in all directions further down the design chain these days. Unlike functionality,... » read more

The Sky Isn’t Falling
By Ed Sperling - 20 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler 3D ICs add a new dimension to design with new degrees of freedom possible, even with the added design and manufacturing complexities. Looking at the semiconductor ecosystem today and anticipating what will be needed to enable 3D ICs, it is certain that relationships will need to change. What will be required of the players and who will take responsibility for wh... » read more

The Double Whammy
By Ed Sperling - 13 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler Given that at 40nm and below every [getkc id="81" kc_name="SoC"] has some mixed-signal content, combined with the fact that power awareness is top priority no matter what the target application is, design teams and verification engineers are grappling with tremendous challenges just to get a chip to yield. “For verification engineers and for designers, this is a ... » read more

The Limits Of Virtualization
By Ed Sperling - 13 Sep, 2012 - Comments: 0

By Ed Sperling The future of virtualization in the corporate data center is firmly established, but questions about the value of virtualization beyond that world remain as fuzzy as the future of many-core systems. While there is no theoretical limit to how many cores can be added into SoCs, there is very little progress in developing applications that can take advantage of all of those core... » read more

Blurring The Lines At The OS Level
By Ed Sperling - 13 Sep, 2012 - Comments: 0

By Ed Sperling Picking an operating system—or choosing not to use an operating system—is becoming as complex a decision as choosing which IP to use in an SoC. Even decisions that sound straightforward may have ramifications on the total system power budget or performance, requiring them to be an integral part of the overall architectural process. But the choice of operating systems, as ... » read more

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