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ECOs and Multi-Patterning: It Can Be Done


By David Abercrombie and Alex Pearson A lot has been written and discussed about how to decompose (color) layouts for advanced process nodes that require multi­patterning (MP). However, one topic that has been sorely ignored is how to efficiently make changes to designs that are already colored, or even taped out and processed. We tend to act like all designs work out the first time through... » read more

When And How Should I Color My DP layout?


Designers working with advanced process technologies that require double patterning often find themselves puzzling over the best way to setup or optimize their design flows to ensure their layouts can be decomposed without time-wasting mistakes. Because manual coloring can be challenging even for experienced engineers, many prefer to use automated coloring solutions. But when is the best time a... » read more

Predictions For 2016: Semiconductors, Manufacturing And Design


Seventeen companies sent in their predictions for this year with some of them sending predictions from several people. This is in addition to the CEO predictions that were recently published. That is a fine crop of views for the coming year, especially since they know that they will be held accountable for their views and this year, just like the last, they will have to answer for them. We beli... » read more

Tech Talk: Double-Triple Patterning


Mentor Graphics' David Abercrombie shows the differences and challenges in double patterning versus triple patterning. [youtube vid= e0wZmjBbEf0] » read more

When Order Matters


Debugging DP errors can be not only time-consuming, but also frustrating, when new errors seem to appear out of nowhere. The order in which you address DP errors can make a significant difference in the efficiency of your debug efforts. Learning the sequence of ordered DP debugging explained in this white paper can not only help you reduce the time you spend analyzing and fixing DP errors, but ... » read more

Resetting Expectations On Multi-Patterning Decomposition And Checking


As I said in Part 1 of this topic, it never ceases to amaze me how much confusion and misunderstanding there is when it comes to multi-patterning (MP) decomposition and checking. That entire first article only focused on the typical subjects I’ve had to discuss with customers regarding double-patterning (DP). I have to tell you that with the deployment of triple-patterning (TP) and quadruple-... » read more

Resetting Expectations On Multi-Patterning Decomposition And Checking


It never ceases to amaze me how much confusion and misunderstanding there is when it comes to multi-patterning (MP) decomposition and checking. I sometimes forget just how new a topic it is in our industry. Because of this short-lived history, and the limited time designers have had to acquire any detailed understanding of its complexity, there appears to be some serious disconnect in expectati... » read more

Double Patterning Custom Design And Debug


Litho-Etch-Litho-Etch (LELE) double pattern (DP) processing affects many aspects of the design flow at/below the 20 nm node level. This can be very disruptive for the custom designer, impacting basic cell design strategy, layout rules and debug as well as parasitic extraction. This paper discusses how to deal with these impacts, avoid common design mistakes, and debug quickly and accurately. ... » read more

EUV: Cost Killer Or Savior?


Moore’s Law, the economic foundation of the semiconductor industry, states that transistor density doubles in each technology generation, at constant cost. As IMEC’s Arindam Mallik explained, however, the transition to a new technology node is not a single event, but a process. Typically, when the new technology is first introduced, it brings a 20% to 25% wafer cost increase. Process opt... » read more

Case Studies in P&R Double-Patterning Debug


In my last article, we looked at some case studies of the unique types of issues related to double patterning (DP) that place and route (P&R) and chip finishing engineers have to deal with. I’ve got some more interesting case studies to show you this time. In modern P&R designs, the metal routes on a particular layer are unidirectional (or at least primarily unidirectional). Long p... » read more

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