tag: double patterning

DFM And Multipatterning
By Ed Sperling - 03 Jul, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss DFM at advanced nodes with Kuang-Kuo Lin, director of foundry design enablement at Samsung Electronics; Jongwook Kye, lithography modeling and architecture fellow at GlobalFoundries; David Abercrombie, advanced physical verification methodology program manager at Mentor Graphics; Ya-Chieh Lai, engineering director for DFM/CLS silicon signoff and ver... » read more

Tech Talk: Multipatterning, Take Two
By Brian Bailey - 31 Mar, 2014 - Comments: 0

Mentor Graphics' David Abercrombie continues with his whiteboard talk about coloring with advanced lithography, including what goes wrong and how to fix it. [youtube vid=HCBtvHCcbf4] » read more

When Order Matters
By David Abercrombie - 20 Mar, 2014 - Comments: 0

Do you brush your teeth before dinner? Put on your shoes before going to bed? Iron your clothes before you wash them? Okay, forget that last one. No one irons clothes anymore…do they? Anyway, my point is, if you want to achieve the best results from a process, order can be really important. And so it is with double patterning (DP) error debugging. As I’ve discussed, there are many types ... » read more

The Road Ahead For 2014: Tools
By Brian Bailey - 30 Jan, 2014 - Comments: 0

In the third and final part of this predictions series we see the natural conclusion of market shifts that are driving changes in semiconductors, and which in turn drive the tools and IP needed to create those systems. To be expected, the changes fall into a few areas: New tools, techniques and changes required for smaller geometries; A migration to higher-levels of abstraction and the... » read more

The Trouble With Triples—Part 2
By David Abercrombie - 23 Jan, 2014 - Comments: 1

In my last blog, we started to look at some of the challenges of triple patterning (TP) compared to double patterning (DP). In particular, we looked at the algorithmic complexity of determining if a valid coloring solution exists, and if so, producing a three-mask decomposition. This time, let’s look into the challenges of what to do if a layout is not legally decomposable into three colors. ... » read more

The Trouble With Triples—Part 1
By David Abercrombie - 14 Nov, 2013 - Comments: 0

If you’re a true geek like me, you may remember the Star Trek episode “The Trouble with Tribbles,” about the cute furry little aliens that purr when you pet them. They seemed so nice and friendly on the surface, but in the end, they became an exponentially growing mass of ravenous monsters that almost broke down the ship and consumed the storehouse of grain that was meant to provide human... » read more

Why does EUV matter?
By Brian Bailey - 01 Oct, 2013 - Comments: 0

By Brian Bailey The end of Moore’s Law has been predicted for almost as long as the law has existed. It normally comes down to some great technological barrier that cannot be breached, only to find that a solution is just around the corner and the concerns fade until the next barrier is identified. At DAC this year (2013), there were many predictions about why Moore’s Law will end in th... » read more

Risk Vs. Reward
By Ed Sperling - 19 Sep, 2013 - Comments: 0

One of the most persistent business myths is that deep pockets in challenging times always win in the end. While that has proven a successful model in many industries where the barrier to entry is enormous and rising, in the technology world the outcome isn’t always what you’d expect even with those same variables. In fact, the history of technology is littered with former business giant... » read more

Layers Of Business And Tech Issues
By Ed Sperling - 15 Aug, 2013 - Comments: 0

Slice an onion in half and one onion pretty much looks like any other onion. Peel it back, layer by layer, and put it under a powerful microscope, and each layer suddenly looks very different. The same is true for semiconductors. To the outside world, a chip is a chip and an interconnect is an interconnect. Each one has different specs, but even the parts that make up those chips look remar... » read more

I Just Want Closure!
By Jean-Marie Brunet - 15 Aug, 2013 - Comments: 0

By Jean-Marie Brunet We all know it by now, but let’s say it one more time for the cameras—the level of complexity of closure at 20 nm and below is considerably higher than for any previous nodes. While the migration of manufacturing requirements into design started with a few suggested activities at 65 nm, such as recommended rules compliance, lithography checks, and critical area analysi... » read more

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