How Secure Is The Package?


Advanced packaging is a viable way of extending the benefits of Moore's Law without the excessive cost of shrinking everything to fit on a single die, but it also raises some issues about security for which there are no clear answers at the moment. OSATs and foundries have been working the kinks out of how to put the pieces together in the most cost-effective and reliable way for the better ... » read more

What Happened To Execute-in-Place?


Executing code directly from non-volatile memory, where it is stored, greatly simplifies compute architectures — especially for simple embedded devices like microcontrollers (MCUs). However, the divergence of memory and logic processes has made that nearly impossible today. The term “execute-in-place,” or ”XIP,” originated with the embedded NOR memory in MCUs that made XIP viable. ... » read more

What’s Next For Semis?


It’s been a turbulent year in the semiconductor industry. 2020 was supposed to be a strong year. Then, the coronavirus outbreak hit. Suddenly, a large percentage of countries implemented various measures to mitigate the outbreak, such as stay-at-home orders as well as business and store closures. Economic turmoil and job losses soon followed, not to mention the human tragedy involved. M... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs As reported, Intel this week reorganized its operations following delays with its 7nm technology. Intel is behind TSMC and Samsung in technology. As a result, TSMC’s foundry customers, such as AMD, Nvidia and others, are also pulling ahead of Intel. In addition, reports have surfaced that Intel will outsource some of its leading-edge chip production to TSMC. To solve t... » read more

Memory Access In AI Systems


Memory access is a key consideration in AI system design. Ron Lowman, strategic marketing manager for IP at Synopsys, talks about how memory affects overall power consumption, why partitioning of on-chip and off-chip is so critical to performance and power, and how this changes from the cloud to the edge. » read more

The Race To Much More Advanced Packaging


Momentum is building for copper hybrid bonding, a technology that could pave the way toward next-generation 2.5D and 3D packages. Foundries, equipment vendors, R&D organizations and others are developing copper hybrid bonding, which is a process that stacks and bonds dies using copper-to-copper interconnects in advanced packages. Still in R&D, hybrid bonding for packaging provides mo... » read more

Semiconductor Memory Evolution And Current Challenges


The very first all-electronic memory was the Williams-Kilburn tube, developed in 1947 at Manchester University. It used a cathode ray tube to store bits as dots on the screen’s surface. The evolution of computer memory since that time has included numerous magnetic memory systems, such as magnetic drum memory, magnetic core memory, magnetic tape drive, and magnetic bubble memory. Since the 19... » read more

Atomic Layer Etch Expands To New Markets


The semiconductor industry is developing the next wave of applications for atomic layer etch (ALE), hoping to get a foothold in some new and emerging markets. ALE, a next-generation etch technology that removes materials at the atomic scale, is one of several tools used to process advanced devices in a fab. ALE moved into production for select applications around 2016, although the technolog... » read more

Moving Data And Computing Closer Together


The speed of processors has increased to the point where they often are no longer the performance bottleneck for many systems. It's now about data access. Moving data around costs both time and power, and developers are looking for ways to reduce the distances that data has to move. That means bringing data and memory nearer to each other. “Hard drives didn't have enough data flow to cr... » read more

Power Impact At The Physical Layer Causes Downstream Effects


Data movement is rapidly emerging as one of the top design challenges, and it is being complicated by new chip architectures and physical effects caused by increasing density at advanced nodes and in multi-chip systems. Until the introduction of the latest revs of high-bandwidth memory, as well as GDDR6, memory was considered the next big bottleneck. But other compute bottlenecks have been e... » read more

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