tag: Ecole Polytechnique Federale de Lausanne

Chip Industry Week In Review
By The SE Staff - 04 Oct, 2024 - Comments: 0

Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Research Bits: July 16
By Jesse Allen - 16 Jul, 2024 - Comments: 0

Kirigami-inspired mechanical computer Researchers from North Carolina State University developed a kirigami-inspired mechanical computer that uses a complex structure of rigid, interconnected polymer cubes to store, retrieve, and erase data without relying on electronic components. The system uses 1-centimeter plastic cubes, grouped into functional units consisting of 64 interconnected cubes. ... » read more

2D UltraLow Temperatures, High Performance Quantum
By Technical Paper Link - 07 Jul, 2024 - Comments: 0

A new technical paper titled "Electrically tunable giant Nernst effect in two-dimensional van der Waals heterostructures" was published by researchers at EPFL and National Institute for Materials Science (Japan). Abstract "The Nernst effect, a transverse thermoelectric phenomenon, has attracted significant attention for its potential in energy conversion, thermoelectrics and spintronics. ... » read more

Voltage Reference Architectures For Harsh Environments: Quantum Computing And Space
By Technical Paper Link - 02 May, 2024 - Comments: 0

A technical paper titled “Cryo-CMOS Voltage References for the Ultrawide Temperature Range From 300 K Down to 4.2 K” was published by researchers at Delft University of Technology, QuTech, Kavli Institute of Nanoscience Delft, and École Polytechnique Fédérale de Lausanne (EPFL). Abstract: "This article presents a family of sub-1-V, fully-CMOS voltage references adopting MOS devices in ... » read more

Large-Scale Integration Of 2D Materials As The Semiconducting Channel In An In-Memory Processor (EPFL)
By Technical Paper Link - 03 Jan, 2024 - Comments: 0

A technical paper titled “A large-scale integrated vector-matrix multiplication processor based on monolayer molybdenum disulfide memories” was published by researchers at École Polytechnique Fédérale de Lausanne (EPFL). Abstract: "Data-driven algorithms—such as signal processing and artificial neural networks—are required to process and extract meaningful information from the mass... » read more

Research Bits: November 21
By Jesse Allen - 21 Nov, 2023 - Comments: 0

MoS2 in-memory processor Researchers from École Polytechnique Fédérale de Lausanne (EPFL) developed a large-scale in-memory processor using the 2D semiconductor material, molybdenum disulfide (MoS2), for the channel material in the more than 1,000 transistors that comprise the processor. The MoS2-based in-memory processor is dedicated to vector-matrix multiplication, key for digital signal ... » read more

Research Bits: September 11
By Jesse Allen - 11 Sep, 2023 - Comments: 0

Combining digital and analog Researchers from École Polytechnique Fédérale de Lausanne (EPFL) propose integrating 2D semiconductors with ferroelectric materials for joint digital and analog information processing, which could improve energy efficiency and support new functionality. The device uses a 2D negative-capacitance tungsten diselenide/tin diselenide tunnel FET (TFET), which consu... » read more

Chip Industry’s Technical Paper Roundup: May 2
By Linda Christensen - 02 May, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=95 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

EPFL’s Open Source Single-Core RISC-V Microcontroller for Edge Computing
By Technical Paper Link - 30 Apr, 2023 - Comments: 0

A new technical paper titled "X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller" was published by researchers at Ecole Polytechnique Fédérale de Lausanne (EPFL). Abstract: "In this work, we present eXtendible Heterogeneous Energy-Efficient Platform (X-HEEP), a configurable and extendible single-core RISC-V-based ultra-low-power microcontroller. X-HEEP can be used ... » read more

Research Bits: April 4
By Jesse Allen - 04 Apr, 2023 - Comments: 0

Wet-like plasma etching Researchers from Nagoya University and Hitachi developed a new etch method called wet-like plasma etching that combines the selectivity of wet etching with the controllability of dry etching. The researchers say the technique will make it possible to etch complex structures such as metal carbides consisting of titanium (Ti) and aluminum (Al), such as TiC or TiAlC, wh... » read more

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