tag: economics

Promises and Perils of Parallel Test
By Anne Meixner - 10 Sep, 2024 - Comments: 1

Testing multiple devices at the same time is not providing the equivalent reduction in overall test time due to a combination of test execution issues, the complexity of the devices being tested, and the complex tradeoffs required for parallelism. Parallel testing is now the norm — from full wafer probe DRAM testing with thousands of dies to two-site testing for complex, high-performance c... » read more

Legacy Process Nodes Going Strong
By Bryon Moyer - 23 Jul, 2024 - Comments: 0

While all eyes tend to focus on the leading-edge silicon nodes, many mature nodes continue to enjoy robust manufacturing demand. Successive nodes stopped reducing die cost at around the 20nm node. “In the finFET era of processes, esoteric process requirements necessary to move technology forward with each generation have added significant cost and complexity,” explained Andrew Appleby, p... » read more

Managing kW Power Budgets
By Ed Sperling - 17 Jul, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss increasing power demands and how to address it with Hans Yeager, senior principal engineer, architecture, at Tenstorrent; Joe Davis, senior director for Calibre interfaces and EM/IR product management at Siemens EDA; Mo Faisal, CEO of Movellus; Trey Roessig, CTO and senior vice president of engineering at Empower Semiconductor.... » read more

What Will That Chip Cost?
By Brian Bailey - 30 Oct, 2023 - Comments: 1

In the past, analysts, consultants, and many other experts attempted to estimate the cost of a new chip implemented in the latest process technology. They concluded that by the 3nm node, only a few companies would be able to afford them — and by the time they got into the angstrom range, probably nobody would. Much has changed over the past few process nodes. Increasing numbers of startups... » read more

Customizing IC Test To Improve Yield And Reliability
By Ed Sperling - 12 Sep, 2023 - Comments: 0

Testing the performance and power of semiconductors as they come off the production line is beginning to shift left in the fab, reversing a long-standing trend of assessing chips just prior to shipping. While this may sound straightforward, it's a difficult challenge which, if successful, will have broad implications for the entire design-through-manufacturing flow. Manufacturers typically g... » read more

EDA, IP Growth Surges Again
By Ed Sperling - 24 Jan, 2023 - Comments: 0

EDA tools and IP revenue increased 8.9% in Q3 of 2022 to $3.767 billion, up from $3.458 billion in 2021, according to a just-released report from the ESD Alliance at SEMI. All regions except Japan reported growth, but the numbers were a bit more uneven in Q3 than in recent quarters. For example, total silicon IP dropped 1%, while services revenue grew 20.8%. At the same time, EDA revenue jum... » read more

Silent Data Corruption
By Ed Sperling - 12 Dec, 2022 - Comments: 0

Defects can creep into chip manufacturing from anywhere, but the problem is getting worse at advanced nodes and in advanced packages where reduced pin access can make testing much more difficult. Ira Leventhal, vice president of U.S. Applied Research and Technology at Advantest America, talks about what’s causing these so-called silent data errors, how to find them, and why it now requires ma... » read more

Challenges Grow For Modeling Auto Performance, Power
By Ann Mutschler - 17 Aug, 2022 - Comments: 0

Rising complexity in automobiles is creating huge challenges about how to add more safety and comfort features and electronics into vehicles without reducing the overall range they can travel or pricing them so high that only the rich can afford them. While the current focus is on modeling hardware and software to understand interactions between systems, this remains a huge challenge. It req... » read more

Tradeoffs In Archiving Data
By Karen Heyman - 11 Aug, 2022 - Comments: 0

If you’ve ever had to sort through old technical documents, wondering what still has value and what can be safely tossed, you can identify with the quandary of Thomas Levy, UCSD professor of anthropology and co-founder of the field of cyber-archaeology. Staring at thousands of pieces of pottery in a Jordanian dessert, he erred on the side of keeping it all. “My personal perspective when ... » read more

New End Markets, More Demand For Complex Chips
By Ed Sperling - 16 May, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss economic conditions and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front... » read more

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