Why Curvy Design Now? Manufacturing Is Possible And Scaling Needs It


Have you ever seen roots or tree branches take a 90-degree turn? Have you ever seen a river that takes a 90-degree turn? Nature doesn’t do 90-degree turns, or for that matter any sharp angle turns – not even 135 degrees. Yet the entire chip-design infrastructure is based on the Manhattan assumption of 90-degree turns. While it would take time to change, is there any doubt that a curvilinea... » read more

The Race Toward Quantum Advantage


Quantum computing has yet to show an advantage over conventional computing, but huge sums of money are betting it will. So far that hasn't happened. Early quantum computers were created in the mid-1990s after mathematicians had demonstrated the effectiveness of applying quantum approaches to some problems. At that stage they were simulated using conventional computing, but it started the rac... » read more

LLM Technology For Chip Design


In the nine short months since OpenAI brought ChatGPT (a Chat Generative Pre-Trained Transformer) and the phenomenal concept of large language models (LLMs) to the global collective consciousness, pioneers from every corner of the economy have raced to understand the benefits—and the pitfalls—of deploying this nascent technology to their particular industry. And as it turns out, semicondu... » read more

Preparing For Commercial Chiplets


Experts at the Table: Semiconductor Engineering sat down to discuss the path to commercialization of chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts of tha... » read more

The Power Of Computational Software: From Revolutionizing Chips To Cancer Research


This post is an excerpt from the keynote presentation at CadenceLIVE India, given by Nimish Modi, senior vice president and general manager of Strategy and New Ventures at Cadence. The semiconductor industry has grown significantly lately but follows a cyclical pattern marked by fluctuations. Currently, we are witnessing a macro-level correction aimed at resolving inventory imbalances. N... » read more

EDA Tool To Detect SW-HW Vulnerabilities Ensuring Data Confidentiality In A RISC-V Architecture


A technical paper titled “SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors” was published by researchers at RWTH Aachen University, Robert Bosch, and Newcastle University. Abstract: "Despite its ever-increasing impact, security is not considered as a design objective in commercial electronic design automation (EDA) tools. This results in vulnerabilities being... » read more

Week In Review: Design, Low Power


Qualcomm, NXP, Infineon, Nordic, and Bosch are jointly investing in a new RISC-V company, to be formed in Germany, that will speed up RISC-V’s adoption in commercial products. The company will be “a single source to enable compatible RISC-V based products, provide reference architectures, and help establish solutions widely used in the industry,” according to a press release. The co... » read more

Semiconductor Industry Is Pulling AI Across A Diversity Of End Uses And Applications


Earlier this month, I had the pleasure of joining a group of industry peers during SEMICON West and the Design Automation Conference in San Francisco for an enlightening panel discussion that we organized titled, “How AI Is Reinventing the Semiconductor Industry Inside and Out.” Moderated by Gartner, I was joined on the panel by senior executives from Advantest, Synopsys and the TinyML Foun... » read more

A Survey Of Machine Learning Applications In Functional Verification


Functional verification is computationally and data-intensive by nature, making it a natural target of machine learning applications. This paper provides a comprehensive and up-to-date analysis of FV problems addressable by ML. Among the various ML techniques and algorithms, several emerging ones have demonstrated outstanding potential in FV. Yet despite the promising research results, criti... » read more

Battling Over Shrinking Physical Margin In Chips


Smaller process nodes, coupled with a continual quest to add more features into designs, are forcing chipmakers and systems companies to choose which design and manufacturing groups have access to a shrinking pool of technology margin. In the past margin largely was split between the foundries, which imposed highly restrictive design rules (RDRs) to compensate for uncertainties in new proces... » read more

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