Smarter Ways To Manufacture Chips

OSAT and wafer fabs are beginning to invest in Industry 4.0 solutions in order to improve efficiency and reduce operating costs, but it's a complicated process that involves setting up frameworks to evaluate different options and goals. Semiconductor manufacturing facilities have relied on dedicated automation teams for decades. These teams track and schedule chip production, respond to equi... » read more

Semiconductor Manufacturing: Tradeoffs Between Performance, Energy Consumption & Cybersecurity Controls

A new research paper titled "Simulating Energy and Security Interactions in Semiconductor Manufacturing: Insights from the Intel Minifab Model" was published by researchers at Idaho National Laboratory, University of Texas at Austin, University of Texas at San Antonio and George Mason University. Abstract: "Semiconductor manufacturing is a highly complex. Fabrication plants must deal with r... » read more

Algorithm HW Framework That Minimizes Accuracy Degradation, Data Movement, And Energy Consumption Of DNN Accelerators (Georgia Tech)

This new research paper titled "An Algorithm-Hardware Co-design Framework to Overcome Imperfections of Mixed-signal DNN Accelerators" was published by researchers at Georgia Tech. According to the paper's abstract, "In recent years, processing in memory (PIM) based mixed-signal designs have been proposed as energy- and area-efficient solutions with ultra high throughput to accelerate DNN com... » read more

Techniques For Improving Energy Efficiency of Training/Inference for NLP Applications, Including Power Capping & Energy-Aware Scheduling

This new technical paper titled "Great Power, Great Responsibility: Recommendations for Reducing Energy for Training Language Models" is from researchers at MIT and Northeastern University. Abstract: "The energy requirements of current natural language processing models continue to grow at a rapid, unsustainable pace. Recent works highlighting this problem conclude there is an urgent need ... » read more

End to End System Design for DRAM-based TRNG

Research paper titled "DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators" is presented from researchers at TOBB University of Economics and Technology and ETH Zurich. Abstract "Random number generation is an important task in a wide variety of critical applications including cryptographic algorithms, scientific simulations, and industrial testing tools. True ... » read more

Neuromorphic Chips & Power Demands

Research paper titled "A Long Short-Term Memory for AI Applications in Spike-based Neuromorphic Hardware," from researchers at Graz University of Technology and Intel Labs. Abstract "Spike-based neuromorphic hardware holds the promise to provide more energy efficient implementations of Deep Neural Networks (DNNs) than standard hardware such as GPUs. But this requires to understand how D... » read more

DarkGates: A Hybrid Power-Gating Architecture to Mitigate the Performance Impact of Dark-Silicon in High Performance Processors

New research paper from ETH Zurich and others. Abstract "To reduce the leakage power of inactive (dark) silicon components, modern processor systems shut-off these components' power supply using low-leakage transistors, called power-gates. Unfortunately, power-gates increase the system's power-delivery impedance and voltage guardband, limiting the system's maximum attainable voltage (i.e., ... » read more

LoRaWAN End Nodes: Security and Energy Efficiency Analysis

New academic research paper from University of Sarajevo and Technical University of Ostrava. Abstract: "With the development of electronics and communication techniques, the interest in realizing sensor networks with a large number of end nodes is growing. The main idea is to install devices in remote locations without direct supervision, which requires an uninterrupted power supply and sec... » read more

An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory

Abstract "A long battery life is a first-class design objective for mobile devices, and main memory accounts for a major portion of total energy consumption. Moreover, the energy consumption from memory is expected to increase further with ever-growing demands for bandwidth and capacity. A hybrid memory system with both DRAM and PCM can be an attractive solution to provide additional capacity ... » read more

Towards Decarbonization: Keeping Electronics Energy Consumption In Check

The International Technology Roadmap for Semiconductors (ITRS) roadmap famously said in 2001 that "cost of design is the greatest threat to the continuation of the semiconductor roadmap." For years, the industry followed the ITRS updates on productivity improvements provided by automating design and hardware to counteract the looming design cost. The discussion on decarbonization has some simil... » read more

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