tag: EPFL

Integrating MEMS with Standardized Silicon Photonics Technology
By Technical Paper Link - 23 Mar, 2023 - Comments: 0

A new technical paper titled "Integrated silicon photonic MEMS" was published by researchers at EPFL, University of Sydney, CSEM, KTH Royal Institute of Technology, Ghent University, Imec, and Tyndall National Institute. Abstract Excerpt "Here, we introduce a silicon photonic MEMS platform consisting of high-performance nano-opto-electromechanical devices fully integrated alongside standar... » read more

Research Bits: Feb. 21
By SE Staff - 21 Feb, 2023 - Comments: 0

High-quality ‘chirps’ for automotive, industrial mmWave radar Imec demonstrated a low-power phase-locked loop (PLL) that generates high-quality frequency-modulated continuous-wave (FMCW) signals for mmWave radar, which can be used in short-range automotive and industrial radar applications. The FMCW radars popular in healthcare, automotive, and industrial send out sinusoidal waves that get... » read more

Week In Review: Design, Low Power
By Jesse Allen - 20 Jan, 2023 - Comments: 0

Worldwide semiconductor revenue increased 1.1% in 2022 to $601.7 billion, up from $595 billion in 2021, according to preliminary results from Gartner. The combined revenue of the top 25 semiconductor vendors increased 2.8% in 2022 and accounted for 77.5% of the market. The memory segment posted a 10% revenue decrease. Analog showed the strongest growth, up 19% from 2021, followed by discretes, ... » read more

Research Bits: Jan. 17
By Jesse Allen - 17 Jan, 2023 - Comments: 0

Ionic circuit for neural nets Researchers at Harvard University and DNA Script developed an ionic circuit comprising hundreds of ionic transistors for neural net computing. While ions in water move slower than electrons in semiconductors, the team noted that the diversity of ionic species with different physical and chemical properties could be harnessed for more diverse information process... » read more

Week In Review: Design, Low Power
By Jesse Allen - 09 Dec, 2022 - Comments: 0

Tools, IP, design Codasip launched a new organization within the company to support the development and commercialization of technical innovations in key applications including security, functional safety, and AI/ML. "As semiconductor scaling is showing its limits, there is an obvious need for new ways of thinking. We will be working with universities, research institutes and strategic partner... » read more

Hot Trends In Semiconductor Thermal Management
By Karen Heyman - 17 Nov, 2022 - Comments: 1

Increasing thermal challenges, as the industry moves into 3D packaging and continues to scale digital logic, are pushing the limits of R&D. The basic physics of having too much heat trapped in too small a space is leading to tangible problems, like consumer products that are too hot to hold. Far worse, however, is the loss of power and reliability, as overheated DRAM has to continually r... » read more

Chip Industry’s Technical Paper Roundup: Oct 18
By Linda Christensen - 18 Oct, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

Thermal Scanning Probe Lithography
By Technical Paper Link - 13 Oct, 2022 - Comments: 0

A new technical paper titled "Edge-Contact MoS2 Transistors Fabricated Using Thermal Scanning Probe Lithography" was published by researchers at École Polytechnique Fédérale de Lausanne (EPFL). "Thermal scanning probe lithography (t-SPL) is a gentle alternative to the typically used electron beam lithography to fabricate these devices avoiding the use of electrons, which are well known to... » read more

Foundational Changes In Chip Architectures
By Brian Bailey - 13 Oct, 2022 - Comments: 5

We take many things in the semiconductor world for granted, but what if some of the decisions made decades ago are no longer viable or optimal? We saw a small example with finFETs, where the planar transistor would no longer scale. Today we are facing several bigger disruptions that will have much larger ripple effects. Technology often progresses in a linear fashion. Each step provides incr... » read more

Distilling The Essence Of Four DAC Keynotes
By Brian Bailey - 28 Jul, 2022 - Comments: 0

Chip design and verification are facing a growing number of challenges. How they will be solved — particularly with the addition of machine learning — is a major question for the EDA industry, and it was a common theme among four keynote speakers at this month's Design Automation Conference. DAC has returned as a live event, and this year's keynotes involved the leaders of a systems comp... » read more

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