Technical Paper Round-Up: June 21


New technical papers added to Semiconductor Engineering’s library this week. [table id=34 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

Hardware Dynamic IFT Mechanism That Scales to Complex Open-Source RISC-V Processors


New technical paper titled "CellIFT: Leveraging Cells for Scalable and Precise Dynamic Information Flow Tracking in Hardware Designs" by researchers at ETH Zurich and Intel.  Paper to be presented at USENIX Security 2022 (August 10-12, 2022) in Boston, MA, USA. Partial Abstract "We introduce CELLIFT, a new design point in the space of dynamic IFT [Information flow tracking] for hardware. C... » read more

ETH Zurich: PIM (Processing In Memory) Architecture, UPMEM & PrIM Benchmarks


New paper technical titled "Benchmarking a New Paradigm: An Experimental Analysis of a Real Processing-in-Memory Architecture" led by researchers at ETH Zurich. Researchers provide a comprehensive analysis of the first publicly-available real-world PIM architecture, UPMEM, and introduce PrIM (Processing-In-Memory benchmarks), a benchmark suite of 16 workloads from different application domai... » read more

Technical Paper Round-Up: June 8


  New technical papers added to Semiconductor Engineering’s library this week. [table id=32 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a ... » read more

Hybrid Sensing Platform w/Silicon Nanowires on a Fully Functional CMOS Chip Containing the Readout Electronics & Signal amplification


New technical paper titled "Multisite Dopamine Sensing With Femtomolar Resolution Using a CMOS Enabled Aptasensor Chip" from TU Dresden, Riken Quantitative Biological Center, Imperial College London, NaMLab gGmbH, ETH Zürich, MaxWell Biosystems AG, TU Wien, and Institute of Radiopharmaceutical Cancer Research. Abstract "Many biomarkers including neurotransmitters are found in external bo... » read more

Technical Paper Round-up: May 31


New technical papers added to Semiconductor Engineering’s library this week. [table id=30 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

ETH Zurich Introduces ProTRR, in-DRAM Rowhammer Mitigation


New technical paper titled "PROTRR: Principled yet Optimal In-DRAM Target Row Refresh" from ETH Zurich. The paper was presented at the 43rd IEEE Symposium on Security and Privacy (SP 2022), San Francisco, CA, USA, May 22–26, 2022. This new paper introduces ProTRR, an "in-DRAM Rowhammer mitigation that is secure against FEINTING, a novel Rowhammer attack." The related video presentation can... » read more

Technical Paper Round-up: May 17


New technical papers added to Semiconductor Engineering’s library this week. [table id=27 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a go... » read more

Circuit knitting Based On Quasiprobability Simulation


New paper "Circuit knitting with classical communication, " from researchers at ETH Zurich and IBM Quantum. Abstract: "The scarcity of qubits is a major obstacle to the practical usage of quantum computers in the near future. To circumvent this problem, various circuit knitting techniques have been developed to partition large quantum circuits into subcircuits that fit on smaller devices,... » read more

Research Platform for Heterogeneous Computing (ETH Zurich)


New academic paper from ETH Zurich, "HEROv2: Full-Stack Open-Source Research Platform for Heterogeneous Computing." Abstract: "Heterogeneous computers integrate general-purpose host processors with domain-specific accelerators to combine versatility with efficiency and high performance. To realize the full potential of heterogeneous computers, however, many hardware and software design ... » read more

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