Consortium Mania Sweeps 450mm Landscape

By Mark LaPedus - 20 Jun, 2013 - Comments: 0

By Mark LaPedus In the mid-1990s, the semiconductor industry embarked on a costly and problematic migration from 200mm to 300mm wafer fabs. At the time, the 300mm development efforts were in the hands of two groups—Sematech and a Japanese-led entity. The equipment industry was on the outside looking in. And as a result, the migration from 200mm to 300mm fabs was out of sync and a nightma... » read more

Experts At The Table: IC Manufacturing Challenges

By Ed Sperling - 08 Oct, 2012 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future manufacturing challenges with Carlos Mazure, chief technical officer at Soitec; Jeff Hebb, vice president of laser product marketing at Ultratech; Markus Wimplinger, corporate technology development and IP director at EV Group; and Girish Dixit, vice president of the customer integration center and process inte... » read more

Experts At The Table: IC Manufacturing Challenges

By Ed Sperling - 01 Oct, 2012 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down with Carlos Mazure, chief technical officer at Soitec; Jeff Hebb, vice president of laser product marketing at Ultratech; Markus Wimplinger, corporate technology development and IP director at EV Group; and Girish Dixit, vice president of the customer integration center and process interactions at Lam Research. What follows are ... » read more

Experts At The Table: IC Manufacturing Challenges

By Ed Sperling - 20 Sep, 2012 - Comments: 0

Options And Hurdles Come Into Focus For 3D Stacking

By Ed Sperling - 29 May, 2012 - Comments: 0

By Mark LaPedus The initial round of stacked 2.5D and 3D chips based on through-silicon vias (TSVs) has emerged in the market. There are other 2.5D/3D chips in the pipeline, but it’s taking longer than expected to bring these devices into production. There are a range of design, manufacturing, supply chain and cost challenges associated with 2.5D/3D designs. The enormous risk to bring ... » read more

FD-SOI Foundations Ready, Say Semi Execs

By Various Writers - 09 Sep, 2011 - Comments: 0

By Adele Hars SOI (especially fully depleted “FD-SOI”) was a hot topic in the video and audio interviews that Debra Vogler of SST released recently. Here are brief summaries of the most important SOI-related interviews – with top brass from Leti, Soitec, KT, EVG and Qcept – that she made at Semicon West ’11. (If you need a quick backgrounder on FD-SOI basics, see this exp... » read more

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tag: EV Group

Consortium Mania Sweeps 450mm Landscape

Experts At The Table: IC Manufacturing Challenges

Experts At The Table: IC Manufacturing Challenges

Experts At The Table: IC Manufacturing Challenges

Options And Hurdles Come Into Focus For 3D Stacking

FD-SOI Foundations Ready, Say Semi Execs