Implementing Mathematical Algorithms In Hardware For Artificial Intelligence


Petabytes of data efficiently travels between edge devices and data centers for processing and computing of AI functions. Accurate and optimized hardware implementations of functions offload many operations that the processing unit would have to execute. As the mathematical algorithms used in AI-based systems evolve, and in some cases stabilize, the demand to implement them in hardware increase... » read more

AI Chips Must Get The Floating-Point Math Right


Most AI chips and hardware accelerators that power machine learning (ML) and deep learning (DL) applications include floating-point units (FPUs). Algorithms used in neural networks today are often based on operations that use multiplication and addition of floating-point values, which subsequently need to be scaled to different sizes and for different needs. Modern FPGAs such as Intel Arria-10 ... » read more

Machine Learning’s Growing Divide


[getkc id="305" kc_name="Machine learning"] is one of the hottest areas of development, but most of the attention so far has focused on the cloud, algorithms and GPUs. For the semiconductor industry, the real opportunity is in optimizing and packaging solutions into usable forms, such as within the automotive industry or for battery-operated consumer or [getkc id="76" kc_name="IoT"] products. ... » read more

Achieving Numerical Precision And Design Customization With Flexible Floating-Point IP


Floating-point operations in application-specific hardware have gained in popularity mostly because they are easier to use than fixed-point operations and they are a better match to numerical behavior in software algorithms. Fixed-point operations present design challenges in the definition of input/output ranges and internal precision for each operation. On the other hand, floating-point opera... » read more