Digital Test Bulks Up – Or Down


Large digital integrated circuits are becoming harder to test in a time- and cost-efficient manner. AI chips, in particular, have tiled architectures that are putting pressure on older testing strategies due to the volume of test vectors required. In some cases, these chips are so large that they exceed reticle size, requiring them to be stitched together. New testing efficiencies are needed... » read more

Picking The Right Location For Probe Stations


High performance flicker noise or phase noise TestCells can be degraded by installing them in a bad location. And just like developing a high-performance system, finding a good location can be a time consuming and difficult task for the typical lab technician that is tasked with setting up the new prober. To do it right requires specialized measurement equipment and tools such as accelerometers... » read more

Does HW Vs. SW Choice Affect Quality And Reliability?


Electronic systems comprise both hardware and software. Which functions are implemented with hardware and which with software are decisions made based upon a wide variety of considerations, including concerns about quality and reliability. Hardware may intrinsically provide for higher device quality, but it is also the source of reliability concerns. This is in contrast with popular views of... » read more

High Throughput Noise Measurements


Flicker noise and random telegraph noise (RTN) testing can take a long time, especially when measuring down to frequencies of 1 Hz or below. Sweep times up to 30 min at a single temperature are common. And standard data collection for device models requires DUT data at multiple temperatures on small pads. To lower Cost of Test (CoT), and significantly increase on-wafer test throughput, a... » read more

Dealing With Two Very Different Sides Of 5G


Semiconductor Engineering sat down to discuss 5G reliability with Anthony Lord, director of RF product marketing at FormFactor; Noam Brousard, system vice president at proteanTecs; Andre van de Geijn, business development manager at yieldHUB; and David Hall, head of semiconductor marketing at National Instruments. What follows are excerpts of that conversation. To view part one of this discussi... » read more

Week In Review: Manufacturing, Test


Trade and government The U.S. continues to tighten its export controls for hi-tech, including a move to restrict fab technologies that enable 5nm chip production. The U.S. Department of Commerce has imposed controls on six more technologies, bringing the total to 37. They include: hybrid additive manufacturing/computer controlled tools; computational lithography software designed for EUV masks... » read more

Making Chips To Last Their Expected Lifetimes


Chips are supposed to last their lifetime, but that expectation varies greatly depending upon the end market, whether the device is used for safety- or mission-critical applications, and even whether it can be easily replaced or remotely fixed. It also depends on how those chips are used, whether they are an essential part of a complex system, and whether the cost of continual monitoring and... » read more

Eliminating Ground-Loop Induced Noise


As semiconductor device performance increases, especially for low power and higher speed ICs, testing low frequency 1/f, RTN and phase noise with improved signal-to-noise ratio is required. Finding and eliminating unwanted noise is required in multiple areas. Noise sources can be found inside a prober, outside a prober, and in a measurement TestCell. Historically, TestCell-generated noise was o... » read more

The Quest To Make 5G Systems Reliable


Semiconductor Engineering sat down to discuss 5G reliability with Anthony Lord, director of RF product marketing at FormFactor; Noam Brousard, system vice president at proteanTecs; Andre van de Geijn, business development manager at yieldHUB; and David Hall, head of semiconductor marketing at National Instruments. What follows are excerpts of that conversation. SE: How do we measure the reli... » read more

New Test Methods For 5G Wafer High-Volume Production


In order to provide the chips required for this change in the landscape, there will be a large number of changing requirements in wafer test that come out of these architectural requirements. Form Factor partnered with Intel to investigate these changes, and tested one such example of a new test methodology. In a joint collaboration with Intel to develop a test methodology for their 5G RF-So... » read more

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