tag: FPGA

Developing A Real-Time SDR System
By Mariusz Grabowski - 29 Jul, 2021 - Comments: 0

As telecommunication technologies evolve there is an on-going drive for the development of high-performance systems for radio communications. Part of that evolution involves implementing components in software functions that had traditionally been implemented in hardware. Software-defined radio (SDR) is a prime example. Significant amounts of signal processing have been handed over to the ge... » read more

Automated Conversion Of Xilinx Vivado Projects To ALINT-PRO
By Aldec - 28 Jul, 2021 - Comments: 0

Aldec's ALINT-PRO design verification solution performs static RTL and design constraints code analysis to uncover critical design issues early in the design cycle. The product helps FPGA developers rise to the challenge of designing large FPGA designs and multiprocessor system on chip devices that include high-capacity and high-performance FPGA hardware. The solution supports running rule c... » read more

ASIC/IC Verification Trends With A Focus On Factors Of Silicon Success
By Harry Foster - 08 Jul, 2021 - Comments: 0

At long last we come to the final installment of our four-part series presenting the findings of the Wilson Research Group Functional Verification 2020 study. In this article we discuss verification trends in IC/ASIC language and library adoption, low power management, and verification effectiveness. We then take a deeper dive into two somewhat surprising phenomena revealed in the data: the ... » read more

Architectural Considerations For AI
By Brian Bailey - 24 Jun, 2021 - Comments: 2

Custom chips, labeled as artificial intelligence (AI) or machine learning (ML), are appearing on a weekly basis, each claiming to be 10X faster than existing devices or consume 1/10 the power. Whether that is enough to dethrone existing architectures, such as GPUs and FPGAs, or whether they will survive alongside those architectures isn't clear yet. The problem, or the opportunity, is that t... » read more

Customizing Chips For Power And Performance
By Ed Sperling - 10 Jun, 2021 - Comments: 0

Sandro Cerato, senior vice president and CTO of the Power & Sensor Systems Business Unit at Infineon Technologies, sat down with Semiconductor Engineering to talk about fundamental shifts in chip design with the rollout of the edge, AI, and more customized solutions. What follows are excerpts of that conversation. SE: The chip market is starting to fall into three distinct buckets, the e... » read more

The Rise Of SmartNICs
By Kartik Srinivasan - 03 Jun, 2021 - Comments: 0

Network interface cards (NICs) have been on the market since shortly after the first PCs in the mid-1980s. However, over the past few years, we’ve seen the emergence of SmartNICs. What is a SmartNIC? The most basic definition of a SmartNIC is simply a programmable NIC. Others have overloaded the concept by heaping vast amounts of silicon and firmware into their implementations. A good work... » read more

Achieving Embedded Design Simplicity With Kria SOMs
By Xilinx - 02 Jun, 2021 - Comments: 0

Xilinx Kria System-on-Modules (SOMs) provide a secure and production-ready multicore Arm processing and FPGA platform, including memories, power management, and your choice of a Yocto or Ubuntu Linux infrastructure to build accelerated AI-enabled applications at the edge. Kria accelerated apps offer an industry-first shortcut that enable both new and experienced Xilinx designers to skip doing a... » read more

Advanced Packaging’s Next Wave
By Mark LaPedus - 20 May, 2021 - Comments: 0

Packaging houses are readying the next wave of advanced packages, enabling new system-level chip designs for a range of applications. These advanced packages involve a range of technologies, such as 2.5D/3D, chiplets, fan-out and system-in-package (SiP). Each of these, in turn, offers an array of options for assembling and integrating complex dies in an advanced package, providing chip custo... » read more

HyperRec: Efficient Recommender Systems with Hyperdimensional Computing
By Technical Paper Link - 12 May, 2021 - Comments: 0

A group of researchers are taking a different approach to AI. The University of California at San Diego, the University of California at Irvine, San Diego State University and DGIST recently presented a paper on a new hardware algorithm based on hyperdimensional (HD) computing, which is a brain-inspired computing model. The new algorithm, called HyperRec, uses data that is modeled with bina... » read more

FPGA Prototyping: Supersizing Scale And Performance
By Synopsys - 11 May, 2021 - Comments: 0

Given the cost of re-spinning a system-on-chip (SoC), semiconductor companies have always looked for ways to verify and validate the SoC before tape-out. Prototyping using field programmable gate arrays (FPGAs) became a key methodology as part of this pre-silicon verification and validation effort. Click here to read more. » read more

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