tag: FPGA

Bridging Machine Learning’s Divide
By Brian Bailey - 08 Feb, 2018 - Comments: 0

There is a growing divide between those researching [getkc id="305" comment="machine learning"] (ML) in the cloud and those trying to perform inferencing using limited resources and power budgets. Researchers are using the most cost-effective hardware available to them, which happens to be GPUs filled with floating point arithmetic units. But this is an untenable solution for embedded infere... » read more

Tech Talk: 5G
By Ed Sperling - 01 Feb, 2018 - Comments: 0

Mike Fitton, senior director of strategic planning at Achronix, talks about the new wireless standard, which will make its debut at the Winter Olympics, when it will go mainstream, and what kinds of technical issues need to be addressed to make that happen. https://youtu.be/tUEMKZpbN2Y » read more

Predictions: Manufacturing, Devices And Companies
By Brian Bailey - 18 Jan, 2018 - Comments: 0

Some predictions are just wishful thinking, but most of these are a lot more thoughtful. They project what needs to happen for various markets or products to become successful. Those far reaching predictions may not fully happen within 2018, but we give everyone the chance to note the progress made towards their predictions at the end of the year. (See Reflection On 2017: Design And EDA and Man... » read more

Warp Speed Ahead
By Ed Sperling - 11 Jan, 2018 - Comments: 3

The computing world is on a tear, but not just in one direction. While battery-powered applications are focused on extending the time between charges or battery replacements, there is a whole separate and growing market for massive improvements in speed. Ultimately, this is where quantum computing will play a role, probably sometime in the late 2020/early 2030 timeframe, according to multipl... » read more

Tech Talk: Debugging ASICs With Embedded FPGAs
By Ed Sperling - 05 Jan, 2018 - Comments: 0

Valy Ossman, senior architecture and applications engineer at Flex Logix, discusses the advantages of debugging an ASIC using an embedded FPGA, including time to market, flexibility in design, and after-market changes. https://youtu.be/XGhFcirS9Vg » read more

Partitioning With Ease
By Henry Chan - 21 Dec, 2017 - Comments: 0

Modern ASIC and SoC designs have increased in complexity such that multiple FPGAs of the largest capacity are now required to prototype the entire functionality of the design. As design sizes increase, more and more FPGAs are required. The capacity and pin limitations of FPGAs create constraints for how the ASIC/SoC design can be mapped into the FPGAs. Aldec’s HES-DVM's prototyping mode accou... » read more

DAC System Design Contest
By Sharon Hu - 20 Dec, 2017 - Comments: 0

When it comes to tackling leading-edge design challenges in fun ways, there’s no better place than DAC. For DAC 2018, we’ve created a System Design Contest targeting machine learning on embedded hardware. If you think this is too leading edge for a design contest, you’d be mistaken: More than 100 teams registered for the contest. You can find a full list of the teams here. So ho... » read more

What’s Next With Computing?
By Mark LaPedus - 18 Dec, 2017 - Comments: 1

At the recent IEDM conference, Jeff Welser, vice president and lab director at IBM Research Almaden, sat down to discuss artificial intelligence, machine learning, quantum computing and supercomputing with Semiconductor Engineering. Here are excerpts of that conversation. SE: Where is high-end computing going? Welser: We are seeing lots of different systems start to come up. First of all,... » read more

Prototyping Partitioning Problems
By Ann Mutschler - 30 Nov, 2017 - Comments: 0

Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This is a new twist for a well-established market. Indeed, prototyping with FPGAs is as old as the [gettech id="31071" t_name="FPGAs"] themselves. Even before they were called FPGAs, logic accelerators or LCAs (logic cell ar... » read more

Week In Review: Design
By Linda Christensen - 22 Nov, 2017 - Comments: 0

Acquisitions Marvell signed a definitive agreement to buy Cavium for roughly $6 billion. The deal is expected to close in mid-2018. The Cavium deal fits squarely on the cloud side and gives Marvell a much bigger reach into enterprise networking and infrastructure, as well as some developing markets. Siemens paid an undisclosed price to buy Solido Design Automation, which tracks variation i... » read more

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