Is Software Necessary?

By Brian Bailey - 27 Aug, 2018 - Comments: 0

Hardware must be capable of running any software. While that might have been a good mantra when chips were relatively simple, it becomes an impossible verification task when dealing with SoCs that contain dozens of deeply embedded processors. When does it become necessary to use production software and what problems can that get you into? When verification targets such as power are added, it... » read more

Chip Aging Becomes Design Problem

By Brian Bailey - 09 Aug, 2018 - Comments: 9

Chip aging is a growing problem at advanced nodes, but so far most design teams have not had to deal with it. That will change significantly as new reliability requirements roll out across markets such as automotive, which require a complete analysis of factors that affect aging. Understanding the underlying physics is critical, because it can lead to unexpected results and vulnerabilities. ... » read more

Process Variation Not A Solved Issue

By Ann Mutschler - 09 Aug, 2018 - Comments: 4

Semiconductor Engineering sat down to talk about process variation in advanced nodes, and how design teams are coping, with Christoph Sohrmann, a member of the Advanced Physical Verification group in Fraunhofer’s Division of Engineering of Adaptive Systems (EAS); Juan Rey, vice president of engineering at Mentor, A Siemens Business; and Stephen Crosher, CEO of Moortec Semiconductor. What foll... » read more

Dynamic Fault Injection For System-Level Simulation Of MEMS

By Fraunhofer IIS/EAS - 08 Aug, 2018 - Comments: 0

In this paper a method for dynamic fault injection and fault simulation as well as its application to MEMS based sensor systems is described. The prerequisite for this approach is the availability of accurate, but numerically efficient models for the MEMS element. Simulations based on SystemC and SystemC AMS are suitable to analyze the nominal behavior of complex sys- tems including electronics... » read more

Return Of The Organic Interposer

By Ed Sperling - 06 Aug, 2018 - Comments: 2

Organic interposers are resurfacing as an option in advanced packaging, several years after they were first proposed as a means of reducing costs in 2.5D multi-die configurations. There are several reasons why there is a renewed interest in this technology: More companies are pushing up against the limits of Moore's Law, where the cost of continuing to shrinking features is exorbitant. ... » read more

More Sigmas In Auto Chips

By Ann Mutschler - 02 Aug, 2018 - Comments: 0

The journey to autonomous cars is forcing fundamental changes in the way chips are designed, tested and tracked, from the overall system functionality to the IP that goes into those systems. This includes everything from new requirements for automotive-grade chips to longer mean time between failures. But it also makes it far more challenging, time-consuming and complicated to create these d... » read more

Safety, Security And PPA Tradeoffs

By Brian Bailey - 23 Jul, 2018 - Comments: 0

Safety and security are emerging as key design tradeoffs as chips are added into safety-critical markets, adding even more complexity into an already complicated optimization process. In the early days of semiconductor design, performance and area were traded off against each other. Then power became important, and the main tradeoffs became power, performance and area (PPA). But as chips inc... » read more

Aging Effects

By Ed Sperling - 17 Jul, 2018 - Comments: 0

Tech Talk: Fraunhofer EAS' group manager for quality and reliability, Andre Lange, talks about how to model aging effects and why the problems are becoming more difficult at advanced nodes. https://youtu.be/XHWww2PE7aY » read more

IoT Wireless Battles Ahead

By Brian Bailey - 18 Jun, 2018 - Comments: 0

"The good thing about standards is that there are so many to choose from." – Andrew S. Tanebaum The extended version of that quote adds "furthermore, if you do not like any of them, you can just wait for next year's model." That could not be truer when it comes to IoT and wireless connectivity. Every standards group is rushing to create new versions of existing standards that use less p... » read more

Upcoming System Modeling Challenges

By Stephan Gerth - 14 Jun, 2018 - Comments: 0

In the past, during the concept phase of a design, system models have typically lacked information regarding reliability. If at all, reliability was addressed late in the design phase shortly before tape out. As the functional safety aspect, and with it an extended device lifetime, gains more and more attention for certain applications, things have to change in the design processes. To ensure a... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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