tag: Fraunhofer IIS/EAS

Architecting Interposers
By Brian Bailey - 14 Oct, 2021 - Comments: 0

An interposer performs a similar function as a printed circuit board (PCB), but when the interposer is moved inside a package the impact is significant. Neither legacy PCB nor IC design tools can fully perform the necessary design and analysis tasks. But perhaps even more important, adding an interposer to a design may require organizational changes. Today, leading-edge companies have shown ... » read more

Software-Hardware Co-Design Becomes Real
By Brian Bailey - 27 Sep, 2021 - Comments: 1

For the past 20 years, the industry has sought to deploy hardware/software co-design concepts. While it is making progress, software/hardware co-design appears to have a much brighter future. In order to understand the distinction between the two approaches, it is important to define some of the basics. Hardware/software co-design is essentially a bottom-up process, where hardware is deve... » read more

The Importance Of Aging Simulation In IC Design
By Andre Lange - 09 Sep, 2021 - Comments: 0

Electronics reliability has been an important quality criterion in the automotive sector and in industrial automation for years. Electronics in this sector have to achieve product lifetimes of 10+ years under partially harsh environmental conditions. But the reliability of electronics is also becoming more important in other fields. For example, end customers now keep consumer products longer, ... » read more

Wrestling With Analog At 3nm
By Brian Bailey - 09 Sep, 2021 - Comments: 0

Analog engineers are facing big challenges at 3nm, forcing them to come up with creative solutions to a widening set of issues at each new process node. Still, these problems must be addressed, because no digital chip will work without at least some analog circuitry. As fabrication technologies shrink, digital logic improves in some combination of power, performance, and area. The process te... » read more

Tradeoffs Between Edge Vs. Cloud
By Brian Bailey - 09 Sep, 2021 - Comments: 0

Increasing amounts of processing are being done on the edge, but how the balance will change between what's computed in the cloud versus the edge remains unclear. The answer may depend as much on the value of data and other commercial reasons as on technical limitations. The pendulum has been swinging between doing all processing in the cloud to doing increasing amounts of processing at the ... » read more

Will Monolithic 3D DRAM Happen?
By Bryon Moyer - 09 Sep, 2021 - Comments: 1

As DRAM scaling slows, the industry will need to look for other ways to keep pushing for more and cheaper bits of memory. The most common way of escaping the limits of planar scaling is to add the third dimension to the architecture. There are two ways to accomplish that. One is in a package, which is already happening. The second is to sale the die into the Z axis, which which has been a to... » read more

An 8 Bit To 12 Bit Resolution Programmable 5 MSample/s Current Steering Digital-To-Analog Converter In A 22 nm FD-SOI CMOS Technology
By Fraunhofer IIS/EAS - 08 Sep, 2021 - Comments: 0

Authors: Jeongwook Koh, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany Shishira S. Venkatesha, Dresden University of Technology, Dresden, Germany Sunil S. Rao, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany Marcel Jotschke, Division Engineering of Ad... » read more

Analyzing Electro-Photonic Systems
By Brian Bailey - 30 Aug, 2021 - Comments: 1

The design and analysis of electro-optical systems is pushing tools into the complex multi-physics domain, making it challenging to create models that execute at reasonable cost — especially when they include thermal impacts. The lack of models and standards also is slowing the progression of the technology. Still the advantages are worth it to those willing to make the investment. Trad... » read more

Modeling Chips From Atoms To Systems
By Ann Mutschler - 26 Aug, 2021 - Comments: 1

Complexity in hardware design is spilling over to other disciplines, including software, manufacturing, and new materials, creating issues for how to model more data at multiple abstraction levels. Challenges are growing around which abstraction level to use for a particular stage of the design, when to use it, and which data to include. Those decisions are becoming more difficult at each ne... » read more

Week In Review: Design, Low Power
By Jesse Allen - 20 Aug, 2021 - Comments: 0

Tools Cadence teamed up with Tower Semiconductor to release a silicon-validated SP4T RF SOI switch reference design flow using the Cadence Virtuoso Design Platform and RF Solution. The reference design flow targets advanced 5G wireless, wireline infrastructure, and automotive IC product development and include a set of mixed-signal and RF design, simulation, system analysis and signoff tools t... » read more

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