tag: Fraunhofer IIS EAS

Design Of An Ultra-Low-Power Current Steering DAC In A Modern SOI technology
By Fraunhofer IIS/EAS - 13 May, 2020 - Comments: 0

Despite the tremendous advancement in innovations on digitizing and processing signals over the last century, real world signals are inevitably analog in nature. A digital-to-analog converter (DAC) serves in translating these digitized signals into different analog quantities like voltage, current or charges. We mainly focus on a Nyquist-rate current-steering digital- to-analog converte... » read more

Practical Processor Verification
By Brian Bailey - 23 Apr, 2020 - Comments: 0

Custom processors are making a resurgence, spurred on by the early success of the RISC-V ISA and the ecosystem that is rapidly building around it. But this shift is amid questions about whether processor verification has become a lost art. Years ago custom processors were common. But as the market consolidated around a handful of companies, so did the tools and expertise needed to develop th... » read more

What’s Holding Back Aging Simulation?
By Andre Lange - 09 Apr, 2020 - Comments: 0

Aging simulation supplies information about the long-term behavior before an IC enters into production, providing an important early evaluation of the reliability required by the application and specification. Re-designs due to reliability issues, and over-design with excessive safety margins, are avoided in this way. In addition, the long-term stability can be demonstrated to the customer. ... » read more

Designing Ultra Low Power AI Processors
By Ann Mutschler - 09 Apr, 2020 - Comments: 0

AI chip design is beginning to shift direction as more computing moves to the edge, adding a level of sophistication and functionality that typically was relegated to the cloud, but in a power envelope compatible with a battery. These changes leverage many existing tools, techniques and best practices for chip design. But they also are beginning to incorporate a variety of new approaches tha... » read more

Power-Hungry Safety And Security
By Brian Bailey - 09 Apr, 2020 - Comments: 0

There is a price to pay for everything. When it comes to adding safety and security into a device, the costs in terms of power and area can be significant, but if the task is taken seriously, those costs can be managed and minimized. New analysis and implementation tools are coming to market that can also help to keep the costs contained. But it also requires the right mindset. As more indus... » read more

Packaging And Package Design For AI At The Edge
By Andy Heinig - 12 Mar, 2020 - Comments: 0

Industrial applications will acquire significantly more data directly from machines in coming years. To properly handle this increase in data, it must already be prepared at the machine. The data of the individual sensors can be processed, or an initial data merger can take place here at the so-called “edge.” Algorithms and methods from the field of artificial intelligence increasingly a... » read more

Grading Chips For Longer Lifetimes
By Ed Sperling - 10 Mar, 2020 - Comments: 0

Figuring out how to grade chips is becoming much more difficult as these chips are used in applications where they are supposed to last for decades rather than just a couple of years. During manufacturing, semiconductors typically are run through a battery of tests involving performance and power, and then priced accordingly. But that is no longer a straightforward process for several reason... » read more

3nm: Blurring Lines Between SoCs, PCBs And Packages
By Ann Mutschler - 02 Mar, 2020 - Comments: 5

Leading-edge chipmakers, foundries and EDA companies are pushing into 3nm and beyond, and they are encountering a long list of challenges that raise questions about whether the entire system needs to be shrunk onto a chip or into a package. For 7nm and 5nm, the problems are well understood. In fact, 5nm appears to be more of an evolution from 7nm than a major shift in direction. But at 3nm, ... » read more

Reliability In Automotive Chips
By Ed Sperling - 17 Feb, 2020 - Comments: 0

Roland Jancke, head of department for design methodology at Fraunhofer IIS’ Engineering of Adaptive Systems Division, looks at how to ensure that chips used in cars are reliable over extended periods of use, how mission profiles vary depending upon where they are used, and why it’s important to understand what chips developed at the latest nodes can really be used for and how they will be ... » read more

Artificial Intelligence For Industrial Applications
By Dirk Mayer - 13 Feb, 2020 - Comments: 0

By Dirk Mayer and Olaf Enge-Rosenblatt Due to digitalization, modern machines and systems provide massive quantities of data, which form a significant basis for the optimization of production processes, operations and safety. These data sets, however, grow more and more complex, which renders the simple analysis methods typically used in the past often ineffective. This is one factor driv... » read more

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