CMOS-Embedded STT-MRAM Arrays In 2xnm Nodes For GP-MCU Applications


Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS- embedded 40 Mb array. Key features are full a... » read more

More Lithography/Mask Challenges (part 1)


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" e_name="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Regina Freed, managing director of patterning technology at [getentity id="... » read more

New Applications, Multiple Approaches


It may be tempting to view the strong demand for semiconductors as just one more up-cycle in our traditionally cyclical industry, but what’s really driving things right now is the opening of entirely new horizons, made possible by the increased capabilities of today’s chips. Chip demand is no longer only being driven by the needs of computer and smartphone manufacturers. Now, a mushroomi... » read more

The Next 5 Years Of Chip Technology


Semiconductor Engineering sat down to discuss the future of scaling, the impact of variation, and the introduction of new materials and technologies, with Rick Gottscho, CTO of Lam Research; Mark Dougherty, vice president of advanced module engineering at GlobalFoundries; David Shortt, technical fellow at KLA-Tencor; Gary Zhang, vice president of computational litho products at ASML; and Shay... » read more

The Week In Review: Manufacturing


Chipmakers and OEMs After more than four years as chief executive of GlobalFoundries, Sanjay Jha will hand over the company’s top position to Thomas Caulfield, senior vice president and general manager at the foundry vendor. Caulfield, who joined GlobalFoundries in 2014, will become CEO. He has been running the company's fab in New York. "Jha intends to work closely with the company’s shar... » read more

Why All Nodes Won’t Work


A flood of new nodes, half-nodes and every number in between is creating confusion among chipmakers. While most say it's good to have choices, it's not clear which or how many of those choices are actually good. At issue is which [getkc id="43" kc_name="IP"] will be available for those nodes, how that IP will differ from other nodes in terms of power, performance, area and sensitivity to a v... » read more

Blog Review: Mar. 7


Synopsys' Amit Paunikar and Shaily Khare take a look at new features in LPDDR5, from improved data bandwidth and Deep Sleep Mode to WCK clock. Cadence's Paul McLellan dives into forward error correction, a technique for automatically correcting errors in transmitted network data, with a look at why it's important and how it works. In his latest embedded software video, Mentor's Colin Wall... » read more

Toward High-End Fan-Outs


Foundries and OSATs are working on more advanced fan-outs, including some with vertically stacked die inside the package, filling a middle ground between lower-cost fan-outs and systems in package on one side and 2.5D and 3D-ICs on the other. These new [getkc id="202" kc_name="fan-outs"] have denser interconnects than previous iterations, and in some cases they include multiple routing layer... » read more

The Week In Review: Manufacturing


Fab tools Samsung Electronics has broken ground on a new extreme ultraviolet (EUV) lithography facility in Hwaseong, South Korea. The new EUV facility is expected to be completed within the second half of 2019 with production slated for 2020. The initial investment in the new EUV line is projected to reach $6 billion by 2020. Imec and Cadence Design Systems have collaborated on the develop... » read more

RISC-V Gains Its Footing


The RISC-V instruction-set architecture, which started as a UC Berkeley project to improve energy efficiency, is gaining steam across the industry. The RISC-V Foundation's member roster gives an indication who is behind this effort. Members include Google, Nvidia, Qualcomm, Rambus, Samsung, NXP, Micron, IBM, GlobalFoundries, UltraSoC, Siemens, among many others. One of the key markets for... » read more

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