tag: GlobalFoundries

New Reliability Issues Emerge
By Ed Sperling - 27 Jun, 2013 - Comments: 0

By Ed Sperling Most consumers define reliability by whether a device turns on and works as planned, but the term is becoming harder to define as complexity increases and systems are interconnected. Adding more functionality in less space has made it more difficult to build complex chips, and it has made it more difficult to prevent problems in those chips. Verification coverage is a persist... » read more

The Week In Review: June 21
By Ed Sperling - 21 Jun, 2013 - Comments: 0

By Ed Sperling Mentor Graphics rolled out emulation-ready verification IP for MIPI camera and display-based protocols. The VIP enables stimuli generated by UVM and SystemC-based environments and applies them to a design under test (DUT) running in the emulator. Synopsys introduced a tool for implementing and verifying functional engineering change orders, including matching, visualization ... » read more

Medical Drives Boom In MEMS
By Ed Sperling - 20 Jun, 2013 - Comments: 0

By Mark LaPedus At a recent event, an executive from a startup called Proteus Digital Health described the medical benefits of swallowing the company’s ingestible sensors or digital pills. First, a consumer would swallow Proteus Digital’s tiny ingestible sensor, along with one’s current medication. With no battery or antenna, the stomach fluid generates the power in the ingestible sen... » read more

Inside A 450mm Metrology Consortium
By Mark LaPedus - 20 Jun, 2013 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss 450mm metrology challenges with Menachem Shoval, a former manufacturing executive at Intel and chairman of the Metro450 consortium. The Israeli-based consortium is developing metrology technology for the next-generation, 450mm wafer size. The group consists of Intel, Applied Materials, Jordan Valley, Nanomotion, Nov... » read more

Merchant Photomask Makers Remain Relevant
By Jeff Chappell - 20 Jun, 2013 - Comments: 0

By Jeff Chappell For many years the trend in the semiconductor industry with regard to photomasks and chipmakers was to shed captive mask operations in favor of merchant photomask suppliers. This reflected a larger trend all along the supply chain with many companies moving away from vertical integration as, consequently, the foundry model grew. "This was mainly driven by cost consideratio... » read more

Consortium Mania Sweeps 450mm Landscape
By Mark LaPedus - 20 Jun, 2013 - Comments: 0

By Mark LaPedus In the mid-1990s, the semiconductor industry embarked on a costly and problematic migration from 200mm to 300mm wafer fabs. At the time, the 300mm development efforts were in the hands of two groups—Sematech and a Japanese-led entity. The equipment industry was on the outside looking in. And as a result, the migration from 200mm to 300mm fabs was out of sync and a nightma... » read more

VLSI Kyoto – The SOI Papers
By Various Writers - 19 Jun, 2013 - Comments: 0

By Adele Hars There were some breakthrough FD-SOI and other excellent SOI-based papers that came out of the 2013 Symposia on VLSI Technology and Circuits in Kyoto (June 10-14, 2013). By way of explanation, VSLI comprises two symposia: one on Technology; one on Circuits. However, papers that are relevant to both were presented in “Jumbo Joint Focus” sessions.  The papers should all b... » read more

The Shape Of Things To Come
By Ed Sperling - 13 Jun, 2013 - Comments: 0

By Ed Sperling The standard method of designing chips—by shrinking features and turning up the clock frequency—is running out of steam for many companies. It’s too difficult, too expensive, and without a commercially viable new lithography source it may become even more unrealistic for most applications. That certainly doesn’t mean Moore’s Law is ending, but it could become more o... » read more

Scaling The Lowly SRAM
By Mark LaPedus - 05 Jun, 2013 - Comments: 0

By Mark LaPedus Chipmakers face a multitude of challenges at the 20nm logic node and beyond, including the task of cramming more functions on the same chip without compromising on power and performance. There is one major challenge that is often overlooked in the equation—scaling the lowly static RAM (SRAM). In one key application, SRAM is the component used to make on-chip cache memories... » read more

The Week In Review: May 31
By Ed Sperling - 31 May, 2013 - Comments: 0

By Ed Sperling Mentor Graphics and GlobalFoundries teamed up to deliver 20nm design kits that include Mentor’s place and route tool, including verification and conflict resolution engines for double-patterning violations. The 20nm process is used for GlobalFoundries’ 14nm finFETs. Mentor also received 16nm finFET certification from TSMC for the same tools plus its physical verification pl... » read more

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