Advancing The Maturity Of Your Hardware Security Program


Where are you today on the Hardware Security Maturity Model? Hardware security is a journey. LEVEL 1: Foundational Define security requirements and validate hardware security features are working with functional verification. LEVEL 2: Basic Introduce threat models and security verification requirements while also enabling hardware protection mechanisms. Ad hoc security verification beg... » read more

Hardware Dynamic IFT Mechanism That Scales to Complex Open-Source RISC-V Processors


New technical paper titled "CellIFT: Leveraging Cells for Scalable and Precise Dynamic Information Flow Tracking in Hardware Designs" by researchers at ETH Zurich and Intel.  Paper to be presented at USENIX Security 2022 (August 10-12, 2022) in Boston, MA, USA. Partial Abstract "We introduce CELLIFT, a new design point in the space of dynamic IFT [Information flow tracking] for hardware. C... » read more

Chips Can Boost Malware Immunity


Security is becoming an increasingly important design element, fueled by increasingly sophisticated attacks, the growing use of technology in safety-critical applications, and the rising value of data nearly everywhere. Hackers can unlock automobiles, phones, and smart locks by exploiting system design soft spots. They even can hack some mobile phones through always-on circuits when they are... » read more

U. Of Florida: Protecting Chip-Design IP From Reverse-Engineering


New research paper titled "Hardening Circuit-Design IP Against Reverse-Engineering Attacks" from University of Florida. "Design-hiding techniques are a central piece of academic and industrial efforts to protect electronic circuits from being reverse-engineered. However, these techniques have lacked a principled foundation to guide their design and security evaluation, leading to a long line... » read more

Novel Analog Key Generation Approach As An Alternative to Conventional Binary Keys (pHGen)


New research paper titled "pHGen: A pH-Based Key Generation Mechanism Using ISFETs" from RWTH Aachen University. Abstract "Digital keys are a fundamental component of many hardware- and software-based security mechanisms. However, digital keys are limited to binary values and easily exploitable when stored in standard memories. In this paper, based on emerging technologies, we introduce... » read more

Building A Robust Hardware Security Program


Even mature chip development teams and processes aren’t immune to security errors. While many semiconductor and hardware manufacturing organizations have mature development processes, existing security testing practices, and formal signoff requirements, the complexity and duration of the chip lifecycle creates many opportunities for security issues to be overlooked. Semiconductors now play... » read more

FICS Research Institute: Detailed Assessment of the PQC Candidates To Power Side Channel Attacks


New research paper by a team of researchers from FICS Research Institute titled "PQC-SEP: Power Side-Channel Evaluation Platform for Post-Quantum Cryptography Algorithms." Abstract "Research in post-quantum cryptography (PQC) aims to develop cryptographic algorithms that can withstand classical and quantum attacks. The recent advance in the PQC field has gradually switched from the theory t... » read more

Spatial Analysis Tools & Side Channel Attacks


Abstract "Practical side-channel attacks on recent devices may be challenging due to the poor quality of acquired signals. It can originate from different factors, such as the growing architecture complexity, especially in System-on-Chips, creating unpredictable and concurrent operation of multiple signal sources in the device. This work makes use of mixture distributions to formalize... » read more

Ensuring Security By Design Is Actually Secure


Today’s connected systems touch nearly every part of consumers’ lives, from smart thermostats in our homes to self-driving cars on our roads. The adoption of these new devices has led to an explosion of new semiconductors and use models. But these novel conveniences also come with new risks. With vulnerabilities on the rise and the potential for remote attacks growing, product companies mus... » read more

Hardware Encryption: Ultra-compact Active Interconnect Based on FeFET


New technical paper "Hardware functional obfuscation with ferroelectric active interconnects" from researchers at Penn State, Rochester Institute of Technology, GlobalFoundries Fab1, North Dakota State University. Abstract "Existing circuit camouflaging techniques to prevent reverse engineering increase circuit-complexity with significant area, energy, and delay penalty. In this paper, we... » read more

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