tag: hardware security

Security In FPGAs And SoCs
By Ed Sperling - 23 Feb, 2021 - Comments: 0

Chip security is becoming a bigger problem across different markets, with different emerging standards and more sophisticated attacks. Jason Moore, senior director of engineering at Xilinx, talks with Semiconductor Engineering about current and future threats and what can be done about them. » read more

Longer Chip Lifecycles Increase Security Threat
By Ed Sperling - 04 Feb, 2021 - Comments: 0

The longer chips and electronic systems remain in use, the more they will need to be refreshed with software and firmware updates. That creates a whole new level of security risks, ranging from over-the-air intercepts to compromised supply chains. These problems have been escalating as more devices are connected to the Internet and to each other, but it's particularly worrisome when it invol... » read more

Radix Coverage For Hardware Common Weakness Enumeration (CWE) Guide
By Tortuga Logic - 03 Feb, 2021 - Comments: 0

MITRE's hardware Common Weakness Enumeration (CWE) database aggregates hardware weaknesses that are the root causes of vulnerabilities in deployed parts. A complete list can be found on the MITRE Hardware Design Webpage. Hardware CWEs are ideal to be used alongside internally developed security requirements databases and have been developed and submitted by both government and commercial design... » read more

The Key is Left under the Mat: On the Inappropriate Security Assumption of Logic Locking Schemes
By Technical Paper Link - 31 Dec, 2020 - Comments: 0

Abstract: "Logic locking has been proposed as an obfuscation technique to protect outsourced IC designs from IP piracy by untrusted entities in the design and fabrication process. In this case, the netlist is locked by adding extra key-gates, and will be unlocked only if a correct key is applied to the key-gates. The key is assumed to be written into a non-volatile memory after the fabricati... » read more

Why It’s So Hard To Stop Cyber Attacks On ICs
By Ed Sperling - 23 Dec, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security risks across multiple market segments with Helena Handschuh, security technologies fellow at Rambus; Mike Borza, principal security technologist for the Solutions Group at Synopsys; Steve Carlson, director of aerospace and defense solutions at Cadence; Alric Althoff, senior hardware security engineer at Tortuga Logic; and Joe Kiniry, princi... » read more

Make Hardware Strong With CWE
By Sergio Marchese - 09 Dec, 2020 - Comments: 0

What is a weakness? And why should we care? These questions are relevant in probably any field or context you may think of, well beyond engineering or electronics. While in some cases the first-level answers might be obvious, in many others they are not. Generally, weaknesses are considered bad things that can lead to malfunctions, injuries, and other undesirable situations. In many cases, they... » read more

Detecting And Preventing Automotive Hardware Security Vulnerabilities
By Tortuga Logic - 02 Dec, 2020 - Comments: 0

In this new whitepaper, you will learn: How to detect and prevent hardware security vulnerabilities in automotive applications with Tortuga Logic’s Radix See how using Radix, as part of your Automotive Security Development Lifecycle, automates and enables a security signoff methodology Click here to read white paper. » read more

Disaggregation And Smarter Chips Shift Liability For Security
By Ed Sperling - 17 Nov, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security on chips with Vic Kulkarni, vice president and chief strategist at Ansys; Jason Oberg, CTO and co-founder of Tortuga Logic; Pamela Norton, CEO and founder of Borsetta; Ron Perez, fellow and technical lead for security architecture at Intel; and Tim Whitfield, vice president of strategy at Arm. What follows are excerpts of that conversation,... » read more

Dealing With Security Holes In Chips
By Ed Sperling - 05 Nov, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security risks across multiple market segments with Helena Handschuh, security technologies fellow at Rambus; Mike Borza, principal security technologist for the Solutions Group at Synopsys; Steve Carlson, director of aerospace and defense solutions at Cadence; Alric Althoff, senior hardware security engineer at Tortuga Logic; and Joe Kiniry, princi... » read more

Security Tradeoffs In Chips And AI Systems
By Ed Sperling - 03 Nov, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss the cost and effectiveness of security in chip architectures and AI systems with with Vic Kulkarni, vice president and chief strategist at Ansys; Jason Oberg, CTO and co-founder of Tortuga Logic; Pamela Norton, CEO and founder of Borsetta; Ron Perez, fellow and technical lead for security architecture at Intel; and Tim Whitfield, vice president of s... » read more

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