tag: HBM

A New Generation Of 7400 Socket
By Brian Bailey - 29 Aug, 2024 - Comments: 0

When I was 18, and just been accepted at Brunel University in West London to start my undergraduate degree in electrical and electronic engineering, I sent off a letter to Texas Instruments telling them about the journey ahead of me and asked if they could they send me a copy of their TTL Data Book. A few weeks later a package arrived and there it was. This incredible brown/orange book, thicker... » read more

3.5D: The Great Compromise
By Ed Sperling - 21 Aug, 2024 - Comments: 1

The semiconductor industry is converging on 3.5D as the next best option in advanced packaging, a hybrid approach that includes stacking logic chiplets and bonding them separately to a substrate shared by other components. This assembly model satisfies the need for big increases in performance while sidestepping some of the thorniest issues in heterogeneous integration. It establishes a midd... » read more

Freeing Up Near-Memory Capacity For Cache Using Compression Techniques In A Flat Hybrid-Memory Architecture
By Technical Paper Link - 13 Aug, 2024 - Comments: 0

A technical paper titled “HMComp: Extending Near-Memory Capacity using Compression in Hybrid Memory” was published by researchers at Chalmers University of Technology and ZeroPoint Technologies. Abstract: "Hybrid memories, especially combining a first-tier near memory using High-Bandwidth Memory (HBM) and a second-tier far memory using DRAM, can realize a large and low cost, high-bandwi... » read more

HBM3E: All About Bandwidth
By Frank Ferro - 08 Aug, 2024 - Comments: 0

The rapid rise in size and sophistication of AI/ML training models requires increasingly powerful hardware deployed in the data center and at the network edge. This growth in complexity and data stresses the existing infrastructure, driving the need for new and innovative processor architectures and associated memory subsystems. For example, even GPT-3 at 175 billion parameters is stressing the... » read more

Are You Ready For HBM4? A Silicon Lifecycle Management (SLM) Perspective
By Faisal Goriawalla - 06 Aug, 2024 - Comments: 0

Many factors are driving system-on-chip (SoC) developers to adopt multi-die technology, in which multiple dies are stacked in a three-dimensional (3D) configuration. Multi-die systems may make power and thermal issues more complex, and they have required major innovations in electronic design automation (EDA) implementation and test tools. These challenges are more than offset by the advantages... » read more

Metrology And Inspection For The Chiplet Era
By Gregory Haley - 06 Aug, 2024 - Comments: 0

New developments and innovations in metrology and inspection will enable chipmakers to identify and address defects faster and with greater accuracy than ever before, all of which will be required at future process nodes and in densely packed assemblies of chiplets. These advances will affect both front-end and back-end processes, providing increased precision and efficiency, combined with a... » read more

Intel Vs. Samsung Vs. TSMC
By Ed Sperling - 15 Jul, 2024 - Comments: 3

The three leading-edge foundries — Intel, Samsung, and TSMC — have started filling in some key pieces in their roadmaps, adding aggressive delivery dates for future generations of chip technology and setting the stage for significant improvements in performance with faster delivery time for custom designs. Unlike in the past, when a single industry roadmap dictated how to get to the next... » read more

Memory On Logic: The Good And Bad
By Brian Bailey - 11 Apr, 2024 - Comments: 0

The chip industry is progressing rapidly toward 3D-ICs, but a simpler step has been shown to provide gains equivalent to a whole node advancement — extracting distributed memories and placing them on top of logic. Memory on logic significantly reduces the distance between logic and directly associated memory. This can increase performance by 22% and reduce power by 36%, according to one re... » read more

HBM3E Memory: Break Through to Greater Bandwidth
By Rambus - 03 Apr, 2024 - Comments: 0

Delivering unrivaled memory bandwidth in a compact, high-capacity footprint, has made HBM the memory of choice for AI training. HBM3 is the third major generation of the HBM standard, with HBM3E offering an extended data rate and the same feature set. The Rambus HBM3E/3 Controller provides industry-leading performance to 9.6 Gb/s, enabling a memory throughput of over 1.23 TB/s for training reco... » read more

What’s Missing In 2.5D EDA Tools
By Brian Bailey - 28 Mar, 2024 - Comments: 0

Gaps in EDA tool chains for 2.5D designs are limiting the adoption of this advanced packaging approach, which so far has been largely confined to high-performance computing. But as the rest of the chip industry begins migrating toward advanced packaging and chiplets, the EDA industry is starting to change direction. There are learning periods with all new technologies, and 2.5D advanced pack... » read more

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