Automated High-Speed Interface Routing in Multi-Die Designs


2.5D and 3D Multi-die design is revolutionizing chip integration by enabling thousands of high-speed connections between dies (also called chiplets). Discover how close placement of dies boosts bandwidth, minimizes latency, and maximizes data throughput. Read this white paper to find out about the importance of interconnectivity planning and die-to-die signal routing for successful m... » read more

HBM4 Sticks With Microbumps, Postponing Hybrid Bonding


The next generation of high-bandwidth memory, HBM4, was widely expected to require hybrid bonding to unlock a 16-high memory stack. A JEDEC move made that unnecessary with this generation, but it’s merely a postponement, not a cancellation. HBM has been in high demand for AI in data centers — especially for training. Data movement dominates energy consumption, and high-bandwidth memories... » read more

Four Architectural Opportunities for LLM Inference Hardware (Google)


A new technical paper titled "Challenges and Research Directions for Large Language Model Inference Hardware" was published by Google. Abstract "Large Language Model (LLM) inference is hard. The autoregressive Decode phase of the underlying Transformer model makes LLM inference fundamentally different from training. Exacerbated by recent AI trends, the primary challenges are memory and in... » read more

Study Of HW Acceleration for Neural Networks (Arizona State Univ.)


A new technical paper titled "Hardware Acceleration for Neural Networks: A Comprehensive Survey" was published by researchers at Arizona State University. Abstract "Neural networks have become a dominant computational workload across cloud and edge platforms, but their rapid growth in model size and deployment diversity has exposed hardware bottlenecks that are increasingly dominated by mem... » read more

Reliability Extension Architecture For Cost-Effective HBM (RPI, ScaleFlux, IBM TJ Watson)


A new technical paper titled "Making Strong Error-Correcting Codes Work Effectively for HBM in AI Inference" was published by researchers at Rensselaer Polytechnic Institute, ScaleFlux and IBM T.J. Watson Research Center. Abstract "LLM inference is increasingly memory bound, and HBM cost per GB dominates system cost. Current HBM stacks include short on-die ECC that tightens binning, raise... » read more

Chip Industry’s Top Videos 2025


Rising complexity, new architectures, and AI's permeation of nearly everything left engineers struggling to keep up in 2025, as evidenced by this year's viewership numbers. Among the hottest topics were verification, agentic AI, DRAM/HBM, optimization of data movement, chiplets, and heterogeneous integration, but there was steady traffic growth across all sectors. Top 10 most-watched videos ... » read more

High Bandwidth Memory (HBM): Everything You Need To Know


In an era where data-intensive applications, from AI and machine learning to high-performance computing (HPC) and gaming, are pushing the limits of traditional memory architectures, High Bandwidth Memory (HBM) has emerged as a high-performance, power-efficient solution. As industries demand faster, higher throughput processing, understanding HBM’s architecture, benefits, and evolving role in ... » read more

AI Memory: Enabling The Next Era Of High-Performance Computing


The rapid advancement of artificial intelligence (AI) is driving unprecedented demand for high-performance memory solutions. AI-driven applications are fueling significant year-over-year growth in high-bandwidth memory (HBM). However, as AI models grow in complexity—from large language models (LLMs) to real-time inference applications—the need for faster, higher-bandwidth, and energy-effici... » read more

HBM Leads The Way To Defect-Free Bumps


High-bandwidth memory stands at the forefront of multiple technology developments as a critical enabler of AI, but it is one of the most difficult modules to manufacture. Leading HBM device makers and foundries must simultaneously handle multi-layer chip stacking, die warpage, and shorter product lifecycles that are shrinking from two years down to just one. But perhaps the most formidable c... » read more

China GenAI: Who Will Fill The Vacuum?


China and the U.S.A are locked in a titanic battle over tariffs. The U.S. makes the world’s best AI Accelerators: Nvidia, AMD, Google, AWS …among others. But the U.S. worries China could deploy these for military purposes, so it imposed strict export controls that resulted in China getting the second-best AI accelerators. These export controls have been further tightened as part of tarif... » read more

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