3D Heterogenous Integration: Design And Verification Challenges


Next-generation semiconductor products increasingly rely on vertical integration technologies to drive system density, speed, and yield improvement. Due to the increased coupling effects across multiple physics, co-simulation and co-analysis of these phenomena are critical for a robust chip-package-system design. Advanced 2.5D/3D-IC systems are constructed with multiple dice, interposers, packa... » read more

Improving Concurrent Chip Design, Manufacturing, And Test Flows


Semiconductor design, manufacturing, and test are becoming much more tightly integrated as the chip industry seeks to optimize designs using fewer engineers, setting the stage for greater efficiencies and potentially lower chip costs without just relying on economies of scale. The glue between these various processes is data, and the chip industry is working to weave together various steps t... » read more

Managing IP In Heterogeneous Designs


Increasing complexity and heterogeneity is creating huge challenges for tracking different versions of IP over the lifetime of chips. Pedro Pires, applications engineer at ClioSoft, talks about the implications of IP reuse in a complex, multi-IP context, including how different standards and database formats can affect IP tracking and why an interoperability layer is essential to tracking IP an... » read more

New End Markets, More Demand For Complex Chips


Experts at the Table: Semiconductor Engineering sat down to discuss economic conditions and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front... » read more

Is Programmable Overhead Worth The Cost?


Programmability has fueled the growth of most semiconductor products, but how much does it actually cost? And is that cost worth it? The answer is more complicated than a simple efficiency formula. It can vary by application, by maturity of technology in a particular market, and in the context of much larger systems. What's considered important for one design may be very different for anothe... » read more

STMicroelectronics Methodology And Process For Heterogeneous Automotive Package Design


As a leading supplier of automotive semiconductors, STMicroelectronics must continue to move fast to develop and deliver leading-edge solutions. Employing package design as part of system innovation requires the STMicroelectronics Back-End Manufacturing Technology R&D organization to embrace the key driving forces of product development. In the automotive field, package designers need to... » read more

Memory Subsystems In Edge Inferencing Chips


Geoff Tate, CEO of Flex Logix, talks about key issues in a memory subsystem in an inferencing chip, how factors like heat can affect performance, and where these kinds of chips will be used. » read more