tag: heterogeneous integration

Hidden Costs And Tradeoffs In IC Quality
By Gregory Haley - 08 Feb, 2024 - Comments: 0

Balancing reliability against cost is becoming more difficult for semiconductor test, as chip complexity increases and devices become more domain-specific. Tests need to be efficient and effective without breaking the bank, while also ensuring chips are of sufficient quality for their specific application. The problem is that every new IC device adds its own set of challenges, from smaller f... » read more

Heterogeneous Integration of Graphene and Hafnium Oxide Memristors Using Pulsed-Laser Deposition
By Technical Paper Link - 30 Jan, 2024 - Comments: 0

A technical paper titled “Heterogeneous Integration of Graphene and HfO2 Memristors” was published by researchers at Forschungszentrum Jülich, Jožef Stefan Institute, and Jülich-Aachen Research Alliance (JARA-FIT). Abstract: "The past decade has seen a growing trend toward utilizing (quasi) van der Waals growth for the heterogeneous integration of various materials for advanced electro... » read more

Chiplet Heterogeneity And Advanced Scheduling With Pipelining
By Technical Paper Link - 12 Jan, 2024 - Comments: 0

A technical paper titled “Inter-Layer Scheduling Space Exploration for Multi-model Inference on Heterogeneous Chiplets” was published by researchers at University of California Irvine. Abstract: "To address increasing compute demand from recent multi-model workloads with heavy models like large language models, we propose to deploy heterogeneous chiplet-based multi-chip module (MCM)-based... » read more

Proprietary Vs. Commercial Chiplets
By Ed Sperling - 19 Dec, 2023 - Comments: 0

Large chipmakers are focusing on chiplets as the best path forward for integrating more functions into electronic devices. The challenge now is how to pull the rest of the chip industry along, creating a marketplace for third-party chiplets that can be chosen from a menu using specific criteria that can speed time to market, help to control costs, and behave as reliably as chiplets developed in... » read more

Next-Gen Power Integrity Challenges
By Ed Sperling - 14 Dec, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss power integrity challenges and best practices in designs at 7nm and below, and in 2.5D and 3D-IC packages, with Chip Stratakos, partner, physical design at Microsoft; Mohit Jain, principal engineer at Qualcomm; Thomas Quan, director at TSMC; and Murat Becer, vice president at Ansys. What follows are excerpts of that conversatio... » read more

Nascent Chiplet Tech Gaining Attention In Defense and Commercial Industries
By Ben Miller - 30 Nov, 2023 - Comments: 0

The economic benefits derived from Moore's Law have changed, and not for the better. This shift – especially on the manufacturing side of system-on-chip (SoC) devices, has both the defense and commercial customers in the semiconductor industry wondering what will come next. One way to extend Moore's Law's cost, feature, and size benefits is with multi-chip technology, now commonly known as... » read more

Building Tomorrow’s Electronics Piece By Piece
By Reela Samuel - 30 Nov, 2023 - Comments: 0

The semiconductor landscape is undergoing a seismic shift as the demand for more powerful and energy-efficient electronic devices reaches new heights. In a recent panel discussion at CadenceLIVE Europe, featuring luminaries such as Kevork Kechichian from Arm, Paul Cunningham from Cadence, Norbert Schuhmann from Fraunhofer, Trent Uehling from NXP, Davide Rossi from the University of Bologna, an... » read more

A Fast And Unified Toolchain For Rapid Design Space Exploration Of Chiplet Architectures
By Technical Paper Link - 27 Nov, 2023 - Comments: 0

A technical paper titled “RapidChiplet: A Toolchain for Rapid Design Space Exploration of Chiplet Architectures” was published by researchers at ETH Zurich and University of Bologna. Abstract: "Chiplet architectures are a promising paradigm to overcome the scaling challenges of monolithic chips. Chiplets offer heterogeneity, modularity, and cost-effectiveness. The design space of chiplet ... » read more

What Can Go Wrong In Heterogeneous Integration
By Ed Sperling - 15 Nov, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss heterogeneous integration with Dick Otte, president and CEO of Promex Industries; Mike Kelly, vice president of chiplets/FCBGA integration at Amkor Technology; Shekhar Kapoor, senior director of product management at Synopsys; John Park, product management group director in Cadence's Custom IC & PCB Group; and Tony Mastroia... » read more

3D Heterogenous Integration: Design And Verification Challenges
By Ansys - 08 Nov, 2023 - Comments: 0

Next-generation semiconductor products increasingly rely on vertical integration technologies to drive system density, speed, and yield improvement. Due to the increased coupling effects across multiple physics, co-simulation and co-analysis of these phenomena are critical for a robust chip-package-system design. Advanced 2.5D/3D-IC systems are constructed with multiple dice, interposers, packa... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy