tag: high aspect ratio etch

Non-Destructive Metrology Techniques For Measuring Hole Profile In DRAM Storage Node
By Onto Innovation - 09 Apr, 2024 - Comments: 0

DRAM storage node profile measurement during high aspect ratio (HAR) etch has been one of the most challenging metrology steps. DRAM storage node profile affects refresh time and device electric quality. So, controlling this profile is one of the key challenges. Conventional 3D modeling in Optical Critical Dimension (OCD) metrology has typically used multiple cylinder stacks. This method cannot... » read more

Speeding Up Process Optimization With Virtual Processing
By Coventor - 16 Jul, 2020 - Comments: 0

Advanced CMOS scaling and new memory technologies have introduced increasingly complex structures into the device manufacturing process. For example, the increase in NAND memory layers has achieved greater vertical NAND scaling and higher memory density, but has led to challenges in high aspect ratio etch patterning and foot print scaling issues. Unique integration and patterning schemes have b... » read more

3D NAND Race Faces Huge Tech And Cost Challenges
By Mark LaPedus - 23 May, 2019 - Comments: 8

Amid the ongoing memory downturn, 3D NAND suppliers continue to race each other to the next technology generations with several challenges and a possible shakeout ahead. Micron, Samsung, SK Hynix and the Toshiba-Western Digital duo are developing 3D NAND products at the next nodes on the roadmap, but the status of two others, Intel and China’s Yangtze Memory Technologies Co. (YMTC), is les... » read more

3D NAND Metrology Challenges Growing
By Mark LaPedus - 09 Apr, 2019 - Comments: 8

3D NAND vendors face several challenges to scale their devices to the next level, but one manufacturing technology stands out as much more difficult at each turn—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems and ensure yields for all chip types. In the case of 3D NAND, the metrology tools are becoming more expensive at each iteration... » read more

Cryogenic Etch Re-Emerges
By Mark LaPedus - 20 Sep, 2018 - Comments: 0

After years in R&D, a technology called cryogenic etch is re-emerging as a possible option for production as the industry faces new challenges in memory and logic. Cryogenic etch removes materials in devices with high aspect ratios at cold temperatures, although it has always been a challenging process. Cryogenic etch is difficult to control and it requires specialized cryogenic gases in... » read more

NAND Market Hits Speed Bump
By Mark LaPedus - 21 Jun, 2017 - Comments: 5

Demand for NAND flash memory remains robust due to the onslaught of data in systems, but the overall NAND flash market is stuck in the middle of a challenging period beset by product shortages, supply chain issues and a difficult technology transition. Intel, Micron, Samsung, SK Hynix and the Toshiba/Western Digital duo continue to ship traditional planar NAND in the market, but this technol... » read more

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