Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 2

By Archana Cheruliyil - 09 Dec, 2024 - Comments: 0

This is the second in a three-part series from Alphawave Semi on HBM4 and gives insights into HBM implementation challenges. Click here for part 1, for an overview on HBM, and in part 3, we will introduce details of a custom HBM implementation. Implementing a 2.5D System-in-Package (SiP) with High Bandwidth Memory (HBM) is a complex process that spans across architecture definition, designi... » read more

Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 1

By Archana Cheruliyil - 26 Nov, 2024 - Comments: 1

This is the first of a three-part series on HBM4 and gives an overview of the HBM standard. Part 2 will provide insights on HBM implementation challenges, and part 3 will introduce the concept of a custom HBM implementation. Relentless growth in data consumption Recent advances in deep learning have had a transformative effect on artificial intelligence (AI) and the ever-increasing volume of ... » read more

HBM Options Increase As AI Demand Soars

By Laura Peters - 21 Nov, 2024 - Comments: 0

High-bandwidth memory (HBM) sales are spiking as the amount of data that needs to be processed quickly by state-of-the-art AI accelerators, graphic processing units, and high-performance computing applications continues to explode. HBM inventories are sold out, driven by massive efforts and investments in developing and improving large language models such as ChatGPT. HBM is the memory of ch... » read more

A New Generation Of 7400 Socket

By Brian Bailey - 29 Aug, 2024 - Comments: 0

When I was 18, and just been accepted at Brunel University in West London to start my undergraduate degree in electrical and electronic engineering, I sent off a letter to Texas Instruments telling them about the journey ahead of me and asked if they could they send me a copy of their TTL Data Book. A few weeks later a package arrived and there it was. This incredible brown/orange book, thicker... » read more

HBM3E: All About Bandwidth

By Frank Ferro - 08 Aug, 2024 - Comments: 0

The rapid rise in size and sophistication of AI/ML training models requires increasingly powerful hardware deployed in the data center and at the network edge. This growth in complexity and data stresses the existing infrastructure, driving the need for new and innovative processor architectures and associated memory subsystems. For example, even GPT-3 at 175 billion parameters is stressing the... » read more

Are You Ready For HBM4? A Silicon Lifecycle Management (SLM) Perspective

By Faisal Goriawalla - 06 Aug, 2024 - Comments: 0

Many factors are driving system-on-chip (SoC) developers to adopt multi-die technology, in which multiple dies are stacked in a three-dimensional (3D) configuration. Multi-die systems may make power and thermal issues more complex, and they have required major innovations in electronic design automation (EDA) implementation and test tools. These challenges are more than offset by the advantages... » read more

What’s Missing In 2.5D EDA Tools

By Brian Bailey - 28 Mar, 2024 - Comments: 0

Gaps in EDA tool chains for 2.5D designs are limiting the adoption of this advanced packaging approach, which so far has been largely confined to high-performance computing. But as the rest of the chip industry begins migrating toward advanced packaging and chiplets, the EDA industry is starting to change direction. There are learning periods with all new technologies, and 2.5D advanced pack... » read more

Enabling Scalable Accelerator Design On Distributed HBM-FPGAs (UCLA)

By Technical Paper Link - 06 Dec, 2023 - Comments: 0

A technical paper titled “TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs” was published by researchers at University of California Los Angeles. Abstract: "Despite the increasing adoption of Field-Programmable Gate Arrays (FPGAs) in compute clouds, there remains a significant gap in programming tools and abstractions which can leverage network-connected, cloud-scale... » read more

The Power Of HBM3 Memory For AI Training Hardware

By Tim Messegee - 09 Nov, 2023 - Comments: 0

AI training data sets are constantly growing, driving the need for hardware accelerators capable of handling terabyte-scale bandwidth. Among the array of memory technologies available, High Bandwidth Memory (HBM) has emerged as the memory of choice for AI training hardware, with the most recent generation, HBM3, delivering unrivaled memory bandwidth. Let’s take a closer look at this important... » read more

DRAM Test And Inspection Just Gets Tougher

By Anne Meixner - 07 Nov, 2023 - Comments: 0

DRAM manufacturers continue to demand cost-effective solutions for screening and process improvement amid growing concerns over defects and process variability, but meeting that demand is becoming much more difficult with the rollout of faster interfaces and multi-chip packages. DRAM plays a key role in a wide variety of electronic devices, from phones and PCs to ECUs in cars and servers ins... » read more

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Knowledge Centers
Entities, people and technologies explored

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New techniques go beyond improved deposition and etching, but challenges stack up, too.

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Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

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Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

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by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

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Megafabs churning out the most advanced processors are not the only game in town.