tag: high-bandwidth memory

From Latency To Reaction: Simulating The Next Wafer Demand Inflection
By Sungho Yoon - 21 Aug, 2025 - Comments: 0

The semiconductor industry faces an unprecedented paradox: AI demand is booming, fab investments are rising, yet wafer shipments remain stubbornly flat. What's driving this disconnect, and when will it break? As of mid-2025, the global silicon wafer market appears calm on the surface, but underlying structural tensions are quietly mounting. The demand for AI semiconductors remains resilient,... » read more

Maximize Uptime And Improve TCO: RAS And Telemetry In HBM4 For Data Centers
By Raj Uppala - 14 Aug, 2025 - Comments: 0

As AI workloads scale and data center operations become increasingly complex, it is critical to keep the infrastructure up and running. Total Cost of Ownership (TCO) is a key metric that includes not only the upfront cost of hardware but also the ongoing expenses of power, cooling, maintenance, and—most importantly—downtime. A single memory failure in a hyperscale AI cluster can cascade int... » read more

Examination Of Thermal Issues Related to Hybrid Bonding of 3D-Stacked HBM
By Technical Paper Link - 16 Jul, 2025 - Comments: 0

A new technical paper titled "Thermal Issues Related to Hybrid Bonding of 3D-Stacked High Bandwidth Memory: A Comprehensive Review" was published by researchers at Chungbuk National University. Abstract "High-Bandwidth Memory (HBM) enables the bandwidth required by modern AI and high-performance computing, yet its three dimensional stack traps heat and amplifies thermo mechanical stress. We... » read more

System-Level Approach To Reducing HBM Cost for AI inference (RPI, IBM)
By Technical Paper Link - 07 Jul, 2025 - Comments: 0

A new technical paper titled "Breaking the HBM Bit Cost Barrier: Domain-Specific ECC for AI Inference Infrastructure" was published by researchers at Rensselaer Polytechnic Institute and IBM. Abstract "High-Bandwidth Memory (HBM) delivers exceptional bandwidth and energy efficiency for AI workloads, but its high cost per bit, driven in part by stringent on-die reliability requirements, pose... » read more

Physics Limits Interposer Line Lengths
By Bryon Moyer - 19 Jun, 2025 - Comments: 1

Electrical interposers provide a convenient surface for mounting multiple chips within a single package, but even though interposer lines theoretically can be routed anywhere, insertion losses limit their practical length. Lines on interposers — and on silicon interposers in particular — can be exceedingly narrow. Having a small cross-section makes such lines resistive, degrading signals... » read more

HBM Roadmap: Next-Gen High-Bandwidth Memory Architectures (KAIST’s TERALAB)
By Technical Paper Link - 16 Jun, 2025 - Comments: 3

A new technical paper titled "HBM Roadmap Ver 1.7 Workshop" was published by researchers at KAIST’s TERALAB. The 371-page paper provides an overview of next-generation HBM architectures based on current technology trends, as well as many technology insights. Find the technical paper here or here.  Published June 2025. Advising Professor : Prof. Joungho Kim. Fig. 1: Thermal Manag... » read more

The Best DRAMs For Artificial Intelligence
By Bryon Moyer - 12 Jun, 2025 - Comments: 0

Artificial intelligence (AI) involves intense computing and tons of data. The computing may be performed by CPUs, GPUs, or dedicated accelerators, and while the data travels through DRAM on its way to the processor, the best DRAM type for this purpose depends on the type of system that is performing the training or inference. The memory challenge facing engineering teams today is how to keep... » read more

HBM4 Elevates AI Training Performance To New Heights
By Nidish Kamath - 15 May, 2025 - Comments: 0

Generative and Agentic AI are pushing an extremely rapid evolution of computing technology. With leading-edge LLMs now in excess of a trillion parameters, training takes an enormous amount of computing capacity, and state-of-the-art training clusters can employ more than 100,000 GPUs. High Bandwidth Memory (HBM) provides the vast memory bandwidth and capacity needed for these demanding AI train... » read more

Speeding Down Memory Lane With Custom HBM
By Faisal Goriawalla - 11 Mar, 2025 - Comments: 0

With the goal of increasing system performance per watt, the semiconductor industry is always seeking innovative solutions that go beyond the usual approaches of increasing memory capacity and data rates. Over the last decade, the High Bandwidth Memory (HBM) protocol has proven to be a popular choice for data center and high-performance computing (HPC) applications. Even more benefit can be rea... » read more

AI’s Rapid Growth: The Crucial Role Of High Bandwidth Memory
By Subash Peddu - 27 Feb, 2025 - Comments: 0

System efficiency is dictated by the performance of crucial components. For AI hardware systems, memory subsystem performance is the single most crucial component. In this blog post, we will provide an overview of the AI model landscape and the impact of HBM memory subsystems on effective system performance. AI models have grown from a few billions of parameters from the early '90s to today�... » read more

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