Smart Manufacturing Gains Momentum

By Ed Sperling - 05 Jan, 2017 - Comments: 0

Smart manufacturing is gaining traction as a way of addressing increased market fragmentation while still leveraging economies of scale. The goal is to add a level of flexibility into manufacturing processes that until recently was considered impossible. Although the approach makes sense in theory, real-world implementation is proving far from consistent. Sometimes referred to as Industr... » read more

Stacked Die Changes

By Ed Sperling - 27 Jul, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss advanced packaging with David Pan, associate professor in the department of electrical and computer engineering at the University of Texas; Max Min, senior technical manager at Samsung; John Hunt, senior director of engineering at ASE; and Sitaram Arkalgud, vice president of 3D portfolio and technologies at Invensas. What follows are excerpts of tha... » read more

Architecting Memory For Next-Gen Data Centers

By Frank Ferro - 26 Jul, 2016 - Comments: 2

The industry’s insatiable appetite for increased bandwidth and ever-higher transfer rates is driven by a burgeoning Internet of Things (IoT), which has ushered in a new era of pervasive connectivity and generated a tsunami of data. In this context, datacenters are currently evaluating a wide range of new memory initiatives. All seek to optimize efficiency by reducing data transport, thus sign... » read more

The Future Of Memory

By Ed Sperling - 16 Jun, 2016 - Comments: 2

Semiconductor Engineering sat down to discuss future memory with Frank Ferro, senior director of product management for memory and interface IP at [getentity id="22671" e_name="Rambus"]; Marc Greenberg, director of product marketing at [getentity id="22035" e_name="Synopsys"]; and Lisa Minwell, [getentity id="22242" e_name="eSilicon"]'s senior director of [getkc id="43" kc_name="IP"] marketing.... » read more

One-On-One: Dave Hemker

By Ed Sperling - 19 May, 2016 - Comments: 0

Dave Hemker, CTO at [getentity id="22820" comment="Lam Research"], sat down with Semiconductor Engineering to look at some of the key issues on the process and manufacturing side, and some of the key developments that will reshape the semiconductor industry in the future. What follows are excerpts of that conversation. SE: One of the big discussion topics these days is [getkc id="208" commen... » read more

2.5D Becomes A Reality

By Ed Sperling - 27 Apr, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

Rightsizing Challenges Grow

By Ed Sperling - 20 Apr, 2016 - Comments: 0

Rightsizing chip architectures is getting much more complicated. There are more options to choose from, more potential bottlenecks, and many more choices about what process to use at what process node and for which markets and price points. Rightsizing is a way of targeting chips to specific application needs, supplying sufficient performance while minimizing power and cost. It has been a to... » read more

It’s All About DRAM

By Ed Sperling - 14 Apr, 2016 - Comments: 4

For decades, the starting point for compute architectures was the processor. In the future, it likely will be the DRAM architecture. Dynamic random access memory always has played a big role in computing. Since IBM's Robert Dennard invented DRAM back in 1966, it has become the gold standard for off-chip memory. It's fast, cheap, reliable, and at least until about 20nm, it has scaled quite n... » read more

2.5D Becomes A Reality

By Ed Sperling - 14 Apr, 2016 - Comments: 2

How Many Cores? (Part 2)

By Ed Sperling - 21 Mar, 2016 - Comments: 1

New chip architectures and new packaging options—including fan-outs and 2.5D—are changing basic design considerations for how many cores are needed, what they are used for, and how to solve some increasingly troublesome bottlenecks. As reported in part one, just adding more cores doesn't necessarily improve performance, and adding the wrong size or kinds of cores wastes power. That has s... » read more

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Knowledge Centers
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tag: high-bandwidth memory

Smart Manufacturing Gains Momentum

Stacked Die Changes

Architecting Memory For Next-Gen Data Centers

The Future Of Memory

One-On-One: Dave Hemker

2.5D Becomes A Reality

Rightsizing Challenges Grow

It’s All About DRAM

2.5D Becomes A Reality

How Many Cores? (Part 2)