tag: high-performance computing

Chiplets: Where Are We Today?
By Barry Pangrle - 05 Feb, 2025 - Comments: 1

The 3rd annual Chiplet Summit was held in Santa Clara from January 21st to 23rd at the Convention Center. The conference continues to grow from its 1st year when it was held at the San Jose Doubletree Hotel (almost exactly 2 years ago). During his Chairman’s Welcome presentation, Chuck Sobey mentioned that there were 41 exhibitors at this year’s conference. Chuck was also the moderator f... » read more

Mass Customization For AI Inference
By Ann Mutschler - 17 Oct, 2024 - Comments: 0

Rising complexity in AI models and an explosion in the number and variety of networks is leaving chipmakers torn between fixed-function acceleration and more programmable accelerators, and creating some novel approaches that include some of both. By all accounts, a general-purpose approach to AI processing is not meeting the grade. General-purpose processors are exactly that. They're not des... » read more

The Crucial Role Of High-Performance Computing In 2024: Balancing Cost And Innovation
By Keith Schaub - 14 May, 2024 - Comments: 0

We live in a world where digital queries run the Information Superhighway and in turn, our lives. This means that the importance of High-Performance Computing (HPC) cannot be overstated. The technology behind this continues to be a cornerstone for advancing our world and improving productivity. To put it another way, can you imagine a day, a week, when you are not querying something? So, let... » read more

Advanced Packaging Design For Heterogeneous Integration
By CP Hung - 18 Apr, 2024 - Comments: 0

As device scaling slows down, a key system functional integration technology is emerging: heterogeneous integration (HI). It leverages advanced packaging technology to achieve higher functional density and lower cost per function. With the continuous development of major semiconductor applications such as AI HPC, edge AI and autonomous electrical vehicles, traditional chips are transforming i... » read more

Integrating Energy Efficiency Considerations Into Your Design From The Beginning
By William Ruby - 11 Apr, 2024 - Comments: 0

Data center networking is responsible for consuming about 1% of the global electricity supply. With the advent and integration of AI into various sectors, the pressure on both hardware and software infrastructures, necessitated by neural networks and extensive language models, is expected to increase significantly. The burgeoning energy consumption by hyperscale data centers emerges as an ur... » read more

The Journey To Exascale Computing And Beyond
By Steven Woo - 14 Dec, 2023 - Comments: 0

High performance computing witnessed one of its most ambitious leaps forward with the development of the US supercomputer “Frontier.” As Scott Atchley from Oak Ridge National Laboratory discussed at Supercomputing 23 (SC23) in Denver last month, the Frontier had the ambitious goal of achieving performance levels 1000 times higher than the petascale systems that preceded it, while also stayi... » read more

Continuous Energy Monte Carlo Particle Transport On AI HW Accelerators
By Technical Paper Link - 20 Nov, 2023 - Comments: 0

A technical paper titled “Efficient Algorithms for Monte Carlo Particle Transport on AI Accelerator Hardware” was published by researchers at Argonne National Laboratory, University of Chicago, and Cerebras Systems. Abstract: "The recent trend toward deep learning has led to the development of a variety of highly innovative AI accelerator architectures. One such architecture, the Cerebras... » read more

Placement And CTS Techniques For High-Performance Computing Designs
By Siemens EDA - 09 Nov, 2023 - Comments: 0

This paper discusses the challenges of designing high-performance computing (HPC) integrated circuits (ICs) to achieve maximum performance. The design process for HPC ICs has become more complex with each new process technology, requiring new architectures and transistors. We highlight how the Siemens Aprisa digital implementation solution can solve placement and clock tree challenges in HPC de... » read more

Placement And CTS Techniques For High-Performance Computing Designs
By Siemens EDA - 09 Nov, 2023 - Comments: 0

This paper discusses the challenges of designing high-performance computing (HPC) integrated circuits (ICs) to achieve maximum performance. The design process for HPC ICs has become more complex with each new process technology, requiring new architectures and transistors. We highlight how the Siemens Aprisa digital implementation solution can solve placement and clock tree challenges in HPC de... » read more

Hardware Security for Silicon Photonic-Based AI Accelerators
By Technical Paper Link - 19 Sep, 2023 - Comments: 0

A technical paper titled “Integrated Photonic AI Accelerators under Hardware Security Attacks: Impacts and Countermeasures” was published by researchers at Ecole Polytechnique de Montreal and Colorado State University. Abstract: "Integrated photonics based on silicon photonics platform is driving several application domains, from enabling ultra-fast chip-scale communication in high-perfor... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy