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Data Centers On Wheels


Automotive architectures are evolving quickly from domain-based to zonal, leveraging the same kind of high-performance computing now found in data centers to make split-second decisions on the road. This is the third major shift in automotive architectures in the past five years, and it's one that centralizes processing using 7nm and 5nm technology, specialized accelerators, high-speed memor... » read more

Geopolitical And Economic Outlook For Chips And Equipment


Experts at the Table: Semiconductor Engineering sat down to discuss geopolitical and economic changes and how they affect the chip industry with Jean-Christophe Eloy, CEO of Yole Developpement; Risto Puhakka, president of VLSI Research; Carolyn Evans, chief economist at Intel; Duncan Meldrum, chief economist at Hilltop Economics; and Rozalia Beica, head of the semiconductor business at AT&S... » read more

Shifting Toward Data-Driven Chip Architectures


An explosion in data is forcing chipmakers to rethink where to process data, which are the best types of processors and memories for different types of data, and how to structure, partition and prioritize the movement of raw and processed data. New chips from systems companies such as Google, Facebook, Alibaba, and IBM all incorporate this approach. So do those developed by vendors like Appl... » read more

Making Lidar More Useful


Lidar, one of a trio of “vision” technologies slated for cars of the future, is improving both in terms of form and function. Willard Tu, director of automotive at Xilinx, talks with Semiconductor Engineering about different approaches and tradeoffs between cost, compute intensity and resolution, various range and field of view options, and why convolutional neural networks are so important... » read more

Scaling Simulation


Without functional simulation the semiconductor industry would not be where it is today, but some people in the industry contend it hasn't received the attention and research it deserves, causing a stagnation in performance. Others disagree, noting that design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job... » read more

RISC-V Targets Data Centers


RISC-V vendors are beginning to aim much higher in the compute hierarchy, targeting data centers and supercomputers rather than just simple embedded applications on the edge. In the past, this would have been nearly impossible for a new instruction set architecture. But a growing focus on heterogeneous chip integration, combined with the reduced benefits of scaling and increasing demand for ... » read more

Applications, Challenges For Using AI In Fabs


Experts at the Table: Semiconductor Engineering sat down to discuss chip scaling, transistors, new architectures, and packaging with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. Wh... » read more

HPC Appliance Boosts Simulation Performance


High-performance computing (HPC) resources can provide a substantial boost to simulation, but an HPC cluster can be complex and difficult to manage. By deploying a managed HPC cluster for ARA, the client was able to eliminate internal maintenance and support overhead, while improving productivity and reliability for their Ansys workloads. Click here to read more. » read more

A Performance Analysis Of The First Generation Of HPC‐Optimized Arm Processors


In this paper, the authors present performance results from Isambard, the first production supercomputer to be based on Arm CPUs that have been optimized specifically for HPC. Isambard is the first Cray XC50 “Scout” system, combining Cavium ThunderX2 Arm‐based CPUs with Cray's Aries interconnect. The full Isambard system contained over 10,000 Arm cores. In this work, we present node‐lev... » read more

‘More Than Moore’ Reality Check


The semiconductor industry is embracing multi-die packages as feature scaling hits the limits of physics, but how to get there with the least amount of pain and at the lowest cost is a work in progress. Gaps remain in tooling and methodologies, interconnect standards are still being developed, and there are so many implementations of packaging that the number of choices is often overwhelming. ... » read more

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