Packaging Technologies Redefine AI And HPC Scalability Limits At ECTC 2026


The 2026 IEEE Electronic Components and Technology Conference (ECTC) showcased how advanced packaging can redefine the scalability limits of artificial intelligence (AI) and high-performance computing (HPC). Across 20 technical papers, Intel Foundry engineers and collaborators highlighted breakthrough innovations — from Embedded Multi-die Interconnect Bridge-T (EMIB-T) enabling large multi-d... » read more

Curvilinear Masks Push The Limits Of Inspection And Metrology


Key Takeaways: Curvilinear masks require native data flows across design, mask data prep, writing, inspection, and metrology. Inspection is shifting from finding all defects to identifying which mask variations actually print on wafer. High-NA EUV will intensify inspection challenges, particularly for small printable defects and actinic contrast limits. Experts at the table:... » read more

Mask Technology Faces A New Set Of Challenges


Key Takeaways: Mask inspection and repair remain the critical bottleneck, even as multi-beam writers have reduced mask-writing constraints. Curvilinear masks are becoming viable for critical layers, but qualification, metrology, and inspection standards still lag production needs. Scaling curvilinear requires curvilinear-native data flows, model-based checks, GPU/HPC compute, and les... » read more

Panel-Level Packaging’s Second Wave Meets Engineering Reality


Key Takeaways Panel-level packaging is arriving not because the engineering is ready, but because wafer-level economics are breaking down. Glass improves the warpage and dimensional stability problems of organic substrates but introduces a different class of failure modes that require materials solutions, not process adjustments. The central challenges of panel-level processing are m... » read more

PCIe 8.0: Enabling The Next Generation Of High Bandwidth Systems


As compute architectures evolve to support increasingly data‑intensive workloads, the role of high‑speed I/O has never been more critical. Artificial intelligence, high‑performance computing, hyperscale infrastructure, and advanced networking all depend on moving massive volumes of data efficiently, reliably, and at scale. The PCI‑SIG’s announcement of PCIe 8.0, which targets 256.0... » read more

Early HBM4 Validation Points The Way For Next Generation AI And HPC Systems


As AI and high‑performance computing systems continue to scale, memory bandwidth has emerged as a primary system‑level constraint. Larger models, higher compute density, and increasingly complex multi‑die designs are driving the need for memory interfaces that can deliver extreme bandwidth while operating within tight power and signal‑integrity margins. High‑Bandwidth Memory (HBM) has... » read more

Advanced Packaging Limits Come Into Focus


Key Takeaways: Packaging is now a performance variable. Substrate, bonding, and process sequence determine what can be built at scale. Warpage underlies most advanced packaging failures and gets harder to control as package sizes grow. Every proposed solution, such as glass, panel processing, and backside power, solves one problem while creating another. Moore's Law has shif... » read more

Ultra Ethernet Security (UET‑TSS) Tailored For AI And HPC


As AI and high‑performance computing (HPC) systems scale from racks to entire data centers, the network has become both a performance enabler and a growing attack surface. Modern AI fabrics interconnect thousands of GPUs and CPUs, move massive volumes of sensitive model data, and increasingly rely on direct memory access rather than host‑mediated communication. These trends exposed a fundam... » read more

Chip Industry Week In Review


Big deals and fundings Teradyne and MultiLane are forming a joint venture, MultiLane Test Products (MLTP), to accelerate the development of test solutions for high speed data connections.  Teradyne will be the majority owner. Ricursive Intelligence raised $300M Series A for AI-driven IC design. IonQ plans to acquire SkyWater for ~$1.8B, creating a "vertically integrated full-stack q... » read more

Low Temperature Cu-Cu Bonding for Advanced Packaging (NYCU)


A new technical paper titled "Thermal stability enhancement of low temperature Cu-Cu bonding using metal passivation technology for advanced electronic packaging" was published by researchers at National Yang Ming Chiao Tung University. Abstract "This work investigates the thermal stability of Cu-Cu bonding using a thin Ag passivation layer in applications targeting advanced packaging. Co... » read more

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