Data Center Evolution: From Pluggable To Co-Packaged Optics

By Rambus - 05 Aug, 2020 - Comments: 0

A torrent of data traffic is growing at an exponential rate driven by applications including 5G, AI/ML, video streaming, online gaming, ADAS and more. Handling this data traffic are hyperscale data centers that have grown to over 500 in number worldwide with a third as many in the pipeline. To scale computing resources to the growing data demands, hyperscale data centers deploy fiber optics thr... » read more

Test Setup Optimization And Automation For Accurate Silicon Photonics Wafer Acceptance Production Tests

By FormFactor - 07 Jul, 2020 - Comments: 0

Implementing energy-efficient optical transceiver modules with silicon photonics (SiPh) and 3DIC technologies will help alleviate the increasing energy consumption for hyperscale data centers. To facilitate effective 3DIC heterogenous integration of these photonics integrated circuits for optical transceivers, high precision, repeatable and reliable SiPh wafer acceptance tests are essential and... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 22 May, 2020 - Comments: 0

Edge, cloud, data center Cadence added new verification IP (VIP) for hyperscalar data centers that supports CXL – Compute Express Link, HBM3, and Ethernet 802.3ck. The VIP are part of Cadence’s Verification Suite. Cadence also released IP for 56G long-reach SerDes on TSMC’s N7 and N6 process technologies. Many Mentor, a Siemens Business, IC design tools are now certified TSMC’s N5 a... » read more

DDR5: The Next-Generation Technology For High Performance Computing

By Synopsys - 13 May, 2020 - Comments: 1

The rapid growth in real-time data requirements for cloud services, IoT, high-performance servers and workstations, hyperscale data centers and big data has increased pressure on memory suppliers to improve memory density and speed. This pressure has resulted in a need for new memory technology that goes beyond the current DDR4 limit of 16 Gb single die capacity and speed of 3200MT/s. Click ... » read more

New Challenges For Data Centers

By Ed Sperling - 08 May, 2019 - Comments: 0

Rita Horner, senior technical marketing manager in Synopsys’ Solutions Group, looks at the impact of a significant rise in data, why this often leads to big cost increases, and where the bottlenecks are occurring. » read more

Nvidia to Buy Mellanox for $6.9B

By Jeff Dorsch - 11 Mar, 2019 - Comments: 0

Nvidia reached a definitive agreement to acquire Mellanox Technologies for $125 a share in cash, giving the deal an enterprise value of about $6.9 billion. The proposed transaction would complement Nvidia’s product portfolio in high-performance computing for applications in artificial intelligence and big data analytics, with Mellanox’s specialty in providing interconnects for hyperscale da... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 12 Oct, 2018 - Comments: 0

Deals Dialog Semiconductor made a blockbuster deal with Apple – the chip company will license power management technologies and transfer some assets to Apple, which will use them in their internal chip research and development. More than 300 Dialog employees, mostly engineers, will join Apple, which will pay $300 million in cash for the transaction and prepay another $300 million for Dialog ... » read more

M2M’s Network Impact

By Ed Sperling - 25 Jul, 2018 - Comments: 0

Synopsys’ Manmeet Walia talks examines the impact of machine-to-machine traffic and why that requires some fundamental changes in networking architectures. Two key issues that need to be addressed are scalability and latency, which require new networking architectures. https://youtu.be/2RIQt3QVPtE » read more

Hyperscaling The Data Center

By Kevin Fogarty - 07 Dec, 2017 - Comments: 1

Enterprise data centers increasingly will look and behave more like slimmed-down versions of hyperscale data centers as chipmakers and other suppliers adapt systems developed for their biggest customers to in-house IT faciilities. The new chips and infrastructure that will serve as building blocks in these facilities will be more power-efficient, make better use of space and generate less he... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?