tag: IEDM

Managing Parasitics For Transistor Performance
By Katherine Derbyshire - 30 Jan, 2017 - Comments: 3

The basic equations describing transistor behavior rely on parameters like channel doping, the capacitance of the gate oxide, and the resistance between the source and drain and the channel. And for most of the IC industry's history, these have been sufficient. “Parasitic” or “external” resistances and capacitances from structures outside the transistor have been small enough to discoun... » read more

The Week In Review: IoT
By Jeff Dorsch - 16 Dec, 2016 - Comments: 0

Tools Google this week updated its Internet of Things platform, releasing a Developer Preview for Android Things, enabling application developers to create IoT devices running on the mobile Android operating system. “We incorporated the feedback from Project Brillo to include familiar tools such as Android Studio, the Android Software Development Kit (SDK), Google Play Services, and Google C... » read more

5 Takeaways from IEDM
By Mark LaPedus - 15 Dec, 2016 - Comments: 1

As usual, the recent IEEE International Electron Devices Meeting (IEDM) was a busy week. The event, which took place in San Francisco, featured a plethora of subjects, such as next-generation transistors and memories. The event also included tracks on non-traditional approaches like quantum and neuromorphic computing. And then, there were sessions on power semis and others. In no partic... » read more

Manufacturing Bits: Oct. 25
By Mark LaPedus - 25 Oct, 2016 - Comments: 0

GaN-on-GaN power semis Power semiconductors based on gallium nitride (GaN) are heating up in the market. Typically, suppliers are shipping devices using a GaN-on-silicon process. These devices are available with blocking voltages of up to 650 volts. Going beyond 650 volts is problematic, however. GaN-on-silicon processes suffer from lattice mismatches, cost and other issues. At the ... » read more

Improving Transistor Reliability
By Katherine Derbyshire - 21 Apr, 2016 - Comments: 1

One of the more important challenges in reliability testing and simulation is the duty cycle dependence of degradation mechanisms such as negative bias temperature instability ([getkc id="278" kc_name="NBTI"]) and hot carrier injection (HCI). For example, as previously discussed, both the shift due to NBTI and the recovery of baseline behavior are very dependent on device workload. This is ... » read more

Will 5nm Happen?
By Mark LaPedus - 20 Jan, 2016 - Comments: 7

Chipmakers are ramping up their 16/14nm finFET processes, with 10nm finFETs expected to ship sometime in late 2016 or early 2017. So what’s next? The foundries can see a path to extend the finFET transistor to 7nm, but the next node, 5nm, is far from certain and may never happen. Indeed, there are several technical and economic challenges at 5nm. And even if 5nm happens, only a few compani... » read more

Manufacturing Bits: Dec. 29
By Mark LaPedus - 29 Dec, 2015 - Comments: 0

Printing hair Using a low-cost, 3D printing technique, Carnegie Mellon University has found a way to produce hair-like strands and fibers. The printer produces plastic hair strand by strand. It takes about 20-25 minutes to generate hair on 10 square millimeters. A video can be seen here. [caption id="attachment_24544" align="alignleft" width="300"] 3D printed hair (Photo: Carnegie Mellon... » read more

Manufacturing Bits: Dec. 15
By Mark LaPedus - 15 Dec, 2015 - Comments: 0

DRAM scaling sans EUV At the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C., chipmakers presented papers on several technologies, including one unlikely topic—DRAM scaling. For years, it was believed that DRAMs would hit the wall and stop scaling at 20nm or so. Then, at that point, the industry would need to migrate to a 3D DRAM structure or a next-generatio... » read more

ReRAM Gains Even More Steam
By Michael Watts - 19 Nov, 2015 - Comments: 0

The prospect of using the latest in finFET processing to enable embedded non-volatile memory (NWM) will be described by a team from TSMC and Tsing Hua University in Taiwan at the IEDM meeting on Dec. 8 in Washington, D.C. Embedded NVM has been the first commercial application of ReRam, with products from Panasonic and Terrazon. Industry leaders agree the creation of NVM as a seamless additio... » read more

Technology Reboot Required
By Brian Bailey - 29 Oct, 2015 - Comments: 1

The International Technology Roadmap for Semiconductors (ITRS) has produced reports outlining the major obstacles the electronics industry faces for a long time now. It attempts to project, with a 15-year horizon, the problems that need to be solved in order to take advantage of the complete design and manufacturing ecosystem. From this, early research efforts can be started. This enabled the E... » read more

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