Manufacturing Bits: Dec. 15


DRAM scaling sans EUV At the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C., chipmakers presented papers on several technologies, including one unlikely topic—DRAM scaling. For years, it was believed that DRAMs would hit the wall and stop scaling at 20nm or so. Then, at that point, the industry would need to migrate to a 3D DRAM structure or a next-generatio... » read more

ReRAM Gains Even More Steam


The prospect of using the latest in finFET processing to enable embedded non-volatile memory (NWM) will be described by a team from TSMC and Tsing Hua University in Taiwan at the IEDM meeting on Dec. 8 in Washington, D.C. Embedded NVM has been the first commercial application of ReRam, with products from Panasonic and Terrazon. Industry leaders agree the creation of NVM as a seamless additio... » read more

Technology Reboot Required


The International Technology Roadmap for Semiconductors (ITRS) has produced reports outlining the major obstacles the electronics industry faces for a long time now. It attempts to project, with a 15-year horizon, the problems that need to be solved in order to take advantage of the complete design and manufacturing ecosystem. From this, early research efforts can be started. This enabled the E... » read more

Reliability After Planar Silicon


Negative bias temperature instability (NBTI) poses a very serious reliability challenge for highly scaled planar silicon transistors, as previously discussed. However, the conventional planar silicon transistor appears to be nearing the end of its life for other reasons, too. The mobility of carriers in silicon limits switching speed even as it becomes more difficult to maintain sufficient elec... » read more

How To Deal With Electromigration


The replacement of aluminum with copper interconnect wiring, first demonstrated by IBM in 1997, brought the integrated circuit industry substantial improvements in both resistance to electromigration and line conductivity. Copper is both a better and more stable conductor than aluminum. Difficult though the transition was, it helped extend device scaling for another eighteen years (and counting... » read more

Darker Silicon


For the last several decades, integrated circuit manufacturers have focused their efforts on [getkc id="74" comment="Moore's Law"], increasing transistor density at constant cost. For much of that time, Dennard’s Law also held: As the dimensions of a device go down, so does power consumption. Smaller transistors ran faster, used less power, and cost less. As most readers already know, howe... » read more

Manufacturing Bits: Jan. 6


Vertical SiC chips for electric cars Silicon carbide (SiC) is a promising material for power electronics. The material has a high breakdown voltage, high operating temperatures and a superior thermal conductivity. At the recent 2014 IEEE International Electron Devices Meeting (IEDM) in San Francisco, Toyota, the National Institute of Advanced Industrial Science and Technology (AIST) and the... » read more

Manufacturing Bits: Dec. 30


Mechanical switches For years, the industry has been talking about the use of advanced mechanical switches in low-power applications. In theory, mechanical switches have zero off-state leakages, abrupt ON/OFF switching capabilities and small voltage swings. Mechanical switches could overcome the energy efficiency limit of CMOS. In fact, mechanical switches could replace CMOS in some applica... » read more

Manufacturing Bits: Dec. 23


Higgs boson sensors At the recent 2014 IEEE International Electron Devices Meeting (IEDM) in San Francisco, CERN described the tiny hybrid pixel detectors used at the Large Hadron Collider (LHC). Using CMOS technology, hybrid pixel detectors identify and tag individual sub-atomic particles at fast speeds. CERN, the European Organization for Nuclear Research, is a particle physics laboratory... » read more

Unraveling The Mysteries At IEDM


In some respects, the 2014 IEEE International Electron Devices Meeting (IEDM) was no different than past events. The event, held this week in San Francisco, included the usual and dizzying array of tutorials, sessions, papers and panels. On the leading-edge CMOS front, for example, the topics included [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D IC"] chips, III-V materials, [getkc ... » read more

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