Manufacturing Bits: Dec. 30

Mechanical switches; TIFETs with iodostannanane; pocket TFETs.

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Mechanical switches
For years, the industry has been talking about the use of advanced mechanical switches in low-power applications. In theory, mechanical switches have zero off-state leakages, abrupt ON/OFF switching capabilities and small voltage swings.

Mechanical switches could overcome the energy efficiency limit of CMOS. In fact, mechanical switches could replace CMOS in some applications. But there are several challenges to develop viable mechanical switches, including contact adhesion, miniaturization and process-induced variability, according to a paper from the University of California at Berkeley and Toshiba at the recent 2014 IEEE International Electron Devices Meeting (IEDM) in San Francisco.

At IEDM, the University of California at Berkeley, along with Toshiba, presented more details about their ongoing work on nano-electro-mechanical (NEM) relay devices. In the lab, researchers developed a 5-terminal, single-pole/double-throw (SPDT) NEM, based on a 3D architecture.

The endurance of such devices is projected to exceed 10(15) ON/OFF cycles at 1 Volt, according to researchers, who added that the technology could be used in wireless sensor networks and other systems. “In addition, relays can function well across a wide range of temperature and can incorporate multiple input and output electrodes for greater functionality as compared with transistors, enabling reductions in device count,” according to the paper at IEDM.

The operation of a conventional three-terminal mechanical switch is fairly simple. “In the OFF state, an airgap separates the movable suspended electrode from the fixed contacting electrode so that no current can flow between them,” according to the paper. “To turn ON the switch, an electrostatic force (Felec) is applied by applying a voltage between the fixed actuator electrode and the suspended electrode to bring it into contact with the contacting electrode.”

But this type of device must overcome the so-called surface adhesion energy limit. To address this issue, “a relay can be designed to be in the ON state as fabricated, so that F(spring) works in the same direction as F(act) to overcome F(adh), and hence F(act) can be smaller than F(adh),” according to the paper. All told, researchers developed a device, which resembles a 5-terminal SPDT, in which electrostatic force is used to switch between two states.

Another issue is that it’s difficult to shrink the device and scale the width of the flexural beam and the gap sizes. “One approach to overcome this challenge is to use a three-dimensional (3-D) structure that leverages an advanced CMOS back-end-of-line (BEOL) process with airgap interconnect structures,” according to the paper.

The BEOL process is based on a 20nm CMOS process. The device makes use of four interconnect layers, of which three are for actuation and one for contact. “A complementary relay design and circuit design methodology should be used to ensure zero crowbar current (in addition to zero standby current) despite process-induced variations in switching voltage, to guarantee ultra-low-power consumption,” according to the paper.

TIFETs with iodostannanane
Topological insulators are creating a buzz. These materials conduct electricity on the surface, while the interior is an insulator. At IEDM, the University of Texas described a topological-insulator field-effect transistor (TIFET) using a new and exotic 2D material called iodostannanane. This technology could exhibit a bandgap exceeding 300 meV at room temperature.

The 2D material consists of a monolayer of tin in a buckled hexagonal lattice. A monolayer of this material is called tin stannanane and a monolayer of tin functionalized with iodine is dubbed iodostannanane.

“An interesting property of stannanane and stannanane functionalized with halogens, is that they are two-dimensional semiconductors with an ‘inverted bandgap’ because of strong spin-orbit coupling,” according to the paper from IEDM. “More specifically, stannanane is a two-dimensional topological insulator, also known as a quantum spin hall insulator, whose band structure differs fundamentally from most other semiconductors.”

The TIFET device structure itself consists of an iodostannanane ribbon. The ribbon is sandwiched between two gates. Source and drain contacts reside at both ends of the ribbon. “The operation principle of the TIFET is: i) in the on-state, electrons travel from the source to the drain with minimal scattering; ii) in the off-state, the Fermi level is moved into the conduction (or valence) band so that scattering to ‘bulk’ states dominates and strongly reduces the current,” according to the paper at IEDM.

Pocket TFETs
At IEDM, Peking University and the Innovation Center for MicroNanoelectronics and Integrated System in China put a new twist on the tunnel field-effect transistor (TFET). Researchers devised a novel TFET design, dubbed the Pocket-mSTFET or PMS-TFET.

TFETs have emerged as a promising next-generation transistor for low-voltage applications, but there are a multitude of challenges for the technology. Low ION is the main challenge of silicon-based TFETs. This is due to its poor tunneling probability, according to researchers.

As a result, researchers proposed a novel TFET design using silicon-on-insulator (SOI) technology. The TFET consists of a comb-shaped gate with multiple fingers and a dopant segregated Schottky source. “The multi-finger gate may induce (a) larger tunneling area and thus larger ION than PJ-TFET, and the fully-depleted pocket at the source tunnel junction can increase the tunneling efficiency for TFET performance enhancement,” according to the paper from IEDM.

“By gate and source engineering without area penalty, the compatibly fabricated PMS-TFET on SOI substrate shows superior performance with the minimum (sub-threshold slope) of 29mV/dec at 300K,” according to the paper at IEDM. “Circuit-level implementation based on PMS-TFET also shows significant improvement on energy efficiency and power reduction at VDD of 0.4V, which indicates great potential of this TFET design for low-power digital and analog applications.”