Manufacturing Bits: June 30


1μm pitch wafer bonding At the recent IEEE Electronic Components and Technology Conference (ECTC), Imec presented a paper on a fine-pitch hybrid wafer-to-wafer bonding technology for heterogeneous integration. Imec described a way to enable hybrid bond pitches down to 1μm using a novel Cu/SiCN (copper/silicon-carbon-nitrogen) surface topography. Today, the industry is developing or shi... » read more

Post Layout Simulation Is Becoming The Bottleneck For Analog Verification


My, have times changed. I remember when I first started out as a green analog designer right out of college, we would cut rubylith masking film on a large light table representing the different layers of our design to generate the design for manufacturing of the chip. We proactively worked to mitigate cross coupling of noise to our signal nets, but we were rarely concerned about interconnect re... » read more

The Good And Bad Of Chiplets


The chiplet model continues to gain traction in the market, but there are still some challenges to enable broader support for the technology. AMD, Intel, TSMC, Marvell and a few others have developed or demonstrated devices using chiplets, which is an alternative way to develop an advanced design. Beyond that, however, the adoption of chiplets is limited in the industry due to ecosystem issu... » read more

Migrating 3D Into The Mainstream


Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for ANSYS' Semiconductor Business Unit; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Business;... » read more

Survival Of The Cheapest?


We all want the best solution to win, but that rarely happens. History is littered with products that were superior to the alternatives and yet lost out to a lessor rival. I am sure several examples are going through your mind without me having to list them. It is normally the first to volume that wins, often accelerated by copious amounts of marketing dollar to help push it against headwinds. ... » read more

New Technologies To Support 3D-ICs


Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for the Semiconductor Business Unit of ANSYS; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Bus... » read more

System Bits: July 30


A camera that sees around corners Researchers at Stanford University developed a camera system that can detect moving objects around a corner, looking at single particles of light reflected on a wall. “People talk about building a camera that can see as well as humans for applications such as autonomous cars and robots, but we want to build systems that go well beyond that,” said Gordon... » read more

Manufacturing Bits: June 25


Panel-level consortium Fraunhofer is moving forward with the next phase of its consortium to develop technologies for panel-level packaging. In 2016, Fraunhofer launched the original effort, dubbed the Panel Level Packaging Consortium. The consortium, which had 17 partners, developed various equipment and materials in the arena. Several test layouts were designed for process development on ... » read more

ECTC Packaging Trends


At the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas, a number of packaging houses, R&D organizations and universities presented a slew of papers on the latest IC packaging technologies. The event provided a glimpse of the future of packaging, which is becoming more important in the industry. At one time, IC packaging took a backseat in the semiconductor... » read more

Chiplet Momentum Builds, Despite Tradeoffs


Chip design is a series of tradeoffs. Some are technical, others are related to cost, competitive features or legal restrictions. But with the nascent 'chiplet' market, many of the established balance points are significantly altered, depending on market segments and ecosystem readiness. Chiplets provide an alternative mechanism for integrating intellectual property (IP) blocks into a semico... » read more

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