tag: IEEE

Week In Review: Design, Low Power
By Jesse Allen - 13 Jul, 2018 - Comments: 0

M&A Intel will acquire fabless company eASIC. Founded in 1999, eASIC sells structured ASIC platforms that act as a midpoint between FPGAs and standard cell ASICs by combining FPGA-like logic and design flows with single via routing. Eventually, Intel sees potential in using its Embedded Multi-Die Interconnect Bridge (EMIB) technology to combine Intel FPGAs with structured ASICs in a system... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 22 Jun, 2018 - Comments: 0

Chipmakers Intel has announced the resignation of Brian Krzanich as chief executive and a member of the board. The board has named Chief Financial Officer Robert Swan as interim chief executive, effective immediately. Intel was recently informed that Krzanich had a “past consensual relationship” with an Intel employee. This is a violation of Intel’s non-fraternization policy, which ap... » read more

Advanced Packaging Confusion
By Ed Sperling - 13 Jun, 2018 - Comments: 2

Advanced packaging is exploding in all directions. There are more chipmakers utilizing different packaging options, more options for the packages themselves, and a confusing array of descriptions and names being used for all of these. Several years ago, there were basically two options on the table, 3D-ICs and 2.5D. But as chipmakers began understanding the difficulty, cost and reduced benef... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 08 Jun, 2018 - Comments: 0

Fab tools Applied Materials has launched a suite of products that will enable cobalt metallization schemes for contacts and interconnects in chips at advanced nodes. The products from Applied enable a complete cobalt fill process. The tools include CMP, CVD, PVD and RTP systems. At advanced nodes, cobalt promises to reduce unwanted resistance in the critical parts of a chip. Cobalt is bein... » read more

The Week In Review: Design
By Jesse Allen - 08 Jun, 2018 - Comments: 0

Tools & IP Synopsys added machine learning capabilities to its Design Platform. The company highlighted benefits to the PrimeTime signoff tool, which saw 5X faster power recovery in customer designs at leading-edge geometries. Renesas is using the tool, noting a 4X power ECO speed-up. ArterisIP unveiled a standalone last level cache (LLC) for high-performance SoCs. CodaCache can be adde... » read more

Designing Hardware For Security
By Ed Sperling - 09 May, 2018 - Comments: 1

By Ed Sperling and Kevin Fogarty Cyber criminals are beginning to target weaknesses in hardware to take control of devices, rather than using the hardware as a stepping stone to access to the software. This shift underscores a significant increase in the sophistication of the attackers, as evidenced by the discovery of Spectre and Meltdown by Google Project Zero in 2017 (made public in Ja... » read more

The Week In Review: Design
By Jesse Allen - 20 Apr, 2018 - Comments: 0

M&A The ESD Alliance is merging with SEMI, becoming a SEMI Strategic Association Partner. SE Editor In Chief Ed Sperling argues that the merger has broad implications for the chip industry, particularly as smaller nodes require greater collaboration between design and manufacturing. Meanwhile, SEMI president and CEO Ajit Manocha explains why the combining will be of benefit to members of b... » read more

The Week In Review: Design
By Jesse Allen - 23 Mar, 2018 - Comments: 0

M&A Synopsys acquired Silicon and Beyond, a provider of high-speed SerDes and ADC/DAC IP. The company was founded in 2012 as SilabTech and headquartered in Bangalore. Synopsys highlighted the team of R&D engineers with high-speed SerDes expertise that would be joining with the acquisition. Terms of the deal were not disclosed. ANSYS will acquire OPTIS, a provider of software for sci... » read more

The Week in Review: IoT
By Jeff Dorsch - 16 Mar, 2018 - Comments: 0

Cybersecurity The United Kingdom government issued a policy report, Secure by Design, calling on Internet of Things device manufacturers to eliminate default passwords, to provide greater transparency in vulnerability disclosure, and to secure credential storage. The report urges shifting cybersecurity responsibility to IoT device vendors, rather than end-users, and protecting the privacy righ... » read more

How The Brain Saves Energy By Doing Less
By Katherine Derbyshire - 15 Mar, 2018 - Comments: 0

One of the arguments for neuromorphic computing is the efficiency of the human brain relative to conventional computers. By looking at how the brain works, this argument contends, we can design systems that accomplish more with less power. However, as Mireille Conrad and others at the University of Geneva pointed out in work presented at December's IEEE Electron Device Meeting, the brain... » read more

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